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![Stewart Smith](/assets/img/avatar_default.png)
Long ago, only in the lab, there was OPALv1 and OPALv2. Now there is just OPALv3, with nobody ever expecting anything on pre-OPALv3 to be cared about or supported by mainline kernels. So, let's remove FW_FEATURE_OPALv3 and instead use FW_FEATURE_OPAL exclusively. Signed-off-by: Stewart Smith <stewart@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
620 lines
16 KiB
C
620 lines
16 KiB
C
/*
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* POWERNV cpufreq driver for the IBM POWER processors
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*
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* (C) Copyright IBM 2014
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*
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* Author: Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#define pr_fmt(fmt) "powernv-cpufreq: " fmt
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#include <linux/kernel.h>
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#include <linux/sysfs.h>
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#include <linux/cpumask.h>
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#include <linux/module.h>
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#include <linux/cpufreq.h>
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#include <linux/smp.h>
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#include <linux/of.h>
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#include <linux/reboot.h>
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#include <linux/slab.h>
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#include <asm/cputhreads.h>
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#include <asm/firmware.h>
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#include <asm/reg.h>
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#include <asm/smp.h> /* Required for cpu_sibling_mask() in UP configs */
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#include <asm/opal.h>
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#define POWERNV_MAX_PSTATES 256
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#define PMSR_PSAFE_ENABLE (1UL << 30)
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#define PMSR_SPR_EM_DISABLE (1UL << 31)
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#define PMSR_MAX(x) ((x >> 32) & 0xFF)
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static struct cpufreq_frequency_table powernv_freqs[POWERNV_MAX_PSTATES+1];
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static bool rebooting, throttled, occ_reset;
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static struct chip {
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unsigned int id;
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bool throttled;
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cpumask_t mask;
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struct work_struct throttle;
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bool restore;
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} *chips;
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static int nr_chips;
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/*
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* Note: The set of pstates consists of contiguous integers, the
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* smallest of which is indicated by powernv_pstate_info.min, the
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* largest of which is indicated by powernv_pstate_info.max.
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*
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* The nominal pstate is the highest non-turbo pstate in this
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* platform. This is indicated by powernv_pstate_info.nominal.
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*/
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static struct powernv_pstate_info {
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int min;
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int max;
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int nominal;
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int nr_pstates;
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} powernv_pstate_info;
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/*
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* Initialize the freq table based on data obtained
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* from the firmware passed via device-tree
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*/
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static int init_powernv_pstates(void)
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{
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struct device_node *power_mgt;
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int i, pstate_min, pstate_max, pstate_nominal, nr_pstates = 0;
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const __be32 *pstate_ids, *pstate_freqs;
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u32 len_ids, len_freqs;
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power_mgt = of_find_node_by_path("/ibm,opal/power-mgt");
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if (!power_mgt) {
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pr_warn("power-mgt node not found\n");
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return -ENODEV;
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}
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if (of_property_read_u32(power_mgt, "ibm,pstate-min", &pstate_min)) {
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pr_warn("ibm,pstate-min node not found\n");
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return -ENODEV;
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}
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if (of_property_read_u32(power_mgt, "ibm,pstate-max", &pstate_max)) {
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pr_warn("ibm,pstate-max node not found\n");
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return -ENODEV;
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}
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if (of_property_read_u32(power_mgt, "ibm,pstate-nominal",
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&pstate_nominal)) {
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pr_warn("ibm,pstate-nominal not found\n");
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return -ENODEV;
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}
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pr_info("cpufreq pstate min %d nominal %d max %d\n", pstate_min,
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pstate_nominal, pstate_max);
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pstate_ids = of_get_property(power_mgt, "ibm,pstate-ids", &len_ids);
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if (!pstate_ids) {
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pr_warn("ibm,pstate-ids not found\n");
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return -ENODEV;
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}
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pstate_freqs = of_get_property(power_mgt, "ibm,pstate-frequencies-mhz",
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&len_freqs);
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if (!pstate_freqs) {
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pr_warn("ibm,pstate-frequencies-mhz not found\n");
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return -ENODEV;
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}
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if (len_ids != len_freqs) {
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pr_warn("Entries in ibm,pstate-ids and "
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"ibm,pstate-frequencies-mhz does not match\n");
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}
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nr_pstates = min(len_ids, len_freqs) / sizeof(u32);
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if (!nr_pstates) {
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pr_warn("No PStates found\n");
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return -ENODEV;
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}
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pr_debug("NR PStates %d\n", nr_pstates);
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for (i = 0; i < nr_pstates; i++) {
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u32 id = be32_to_cpu(pstate_ids[i]);
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u32 freq = be32_to_cpu(pstate_freqs[i]);
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pr_debug("PState id %d freq %d MHz\n", id, freq);
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powernv_freqs[i].frequency = freq * 1000; /* kHz */
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powernv_freqs[i].driver_data = id;
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}
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/* End of list marker entry */
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powernv_freqs[i].frequency = CPUFREQ_TABLE_END;
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powernv_pstate_info.min = pstate_min;
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powernv_pstate_info.max = pstate_max;
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powernv_pstate_info.nominal = pstate_nominal;
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powernv_pstate_info.nr_pstates = nr_pstates;
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return 0;
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}
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/* Returns the CPU frequency corresponding to the pstate_id. */
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static unsigned int pstate_id_to_freq(int pstate_id)
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{
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int i;
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i = powernv_pstate_info.max - pstate_id;
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if (i >= powernv_pstate_info.nr_pstates || i < 0) {
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pr_warn("PState id %d outside of PState table, "
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"reporting nominal id %d instead\n",
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pstate_id, powernv_pstate_info.nominal);
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i = powernv_pstate_info.max - powernv_pstate_info.nominal;
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}
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return powernv_freqs[i].frequency;
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}
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/*
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* cpuinfo_nominal_freq_show - Show the nominal CPU frequency as indicated by
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* the firmware
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*/
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static ssize_t cpuinfo_nominal_freq_show(struct cpufreq_policy *policy,
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char *buf)
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{
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return sprintf(buf, "%u\n",
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pstate_id_to_freq(powernv_pstate_info.nominal));
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}
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struct freq_attr cpufreq_freq_attr_cpuinfo_nominal_freq =
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__ATTR_RO(cpuinfo_nominal_freq);
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static struct freq_attr *powernv_cpu_freq_attr[] = {
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&cpufreq_freq_attr_scaling_available_freqs,
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&cpufreq_freq_attr_cpuinfo_nominal_freq,
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NULL,
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};
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/* Helper routines */
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/* Access helpers to power mgt SPR */
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static inline unsigned long get_pmspr(unsigned long sprn)
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{
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switch (sprn) {
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case SPRN_PMCR:
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return mfspr(SPRN_PMCR);
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case SPRN_PMICR:
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return mfspr(SPRN_PMICR);
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case SPRN_PMSR:
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return mfspr(SPRN_PMSR);
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}
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BUG();
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}
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static inline void set_pmspr(unsigned long sprn, unsigned long val)
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{
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switch (sprn) {
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case SPRN_PMCR:
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mtspr(SPRN_PMCR, val);
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return;
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case SPRN_PMICR:
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mtspr(SPRN_PMICR, val);
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return;
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}
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BUG();
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}
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/*
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* Use objects of this type to query/update
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* pstates on a remote CPU via smp_call_function.
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*/
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struct powernv_smp_call_data {
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unsigned int freq;
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int pstate_id;
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};
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/*
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* powernv_read_cpu_freq: Reads the current frequency on this CPU.
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*
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* Called via smp_call_function.
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*
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* Note: The caller of the smp_call_function should pass an argument of
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* the type 'struct powernv_smp_call_data *' along with this function.
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*
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* The current frequency on this CPU will be returned via
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* ((struct powernv_smp_call_data *)arg)->freq;
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*/
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static void powernv_read_cpu_freq(void *arg)
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{
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unsigned long pmspr_val;
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s8 local_pstate_id;
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struct powernv_smp_call_data *freq_data = arg;
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pmspr_val = get_pmspr(SPRN_PMSR);
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/*
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* The local pstate id corresponds bits 48..55 in the PMSR.
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* Note: Watch out for the sign!
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*/
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local_pstate_id = (pmspr_val >> 48) & 0xFF;
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freq_data->pstate_id = local_pstate_id;
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freq_data->freq = pstate_id_to_freq(freq_data->pstate_id);
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pr_debug("cpu %d pmsr %016lX pstate_id %d frequency %d kHz\n",
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raw_smp_processor_id(), pmspr_val, freq_data->pstate_id,
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freq_data->freq);
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}
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/*
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* powernv_cpufreq_get: Returns the CPU frequency as reported by the
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* firmware for CPU 'cpu'. This value is reported through the sysfs
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* file cpuinfo_cur_freq.
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*/
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static unsigned int powernv_cpufreq_get(unsigned int cpu)
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{
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struct powernv_smp_call_data freq_data;
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smp_call_function_any(cpu_sibling_mask(cpu), powernv_read_cpu_freq,
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&freq_data, 1);
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return freq_data.freq;
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}
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/*
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* set_pstate: Sets the pstate on this CPU.
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*
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* This is called via an smp_call_function.
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*
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* The caller must ensure that freq_data is of the type
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* (struct powernv_smp_call_data *) and the pstate_id which needs to be set
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* on this CPU should be present in freq_data->pstate_id.
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*/
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static void set_pstate(void *freq_data)
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{
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unsigned long val;
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unsigned long pstate_ul =
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((struct powernv_smp_call_data *) freq_data)->pstate_id;
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val = get_pmspr(SPRN_PMCR);
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val = val & 0x0000FFFFFFFFFFFFULL;
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pstate_ul = pstate_ul & 0xFF;
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/* Set both global(bits 56..63) and local(bits 48..55) PStates */
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val = val | (pstate_ul << 56) | (pstate_ul << 48);
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pr_debug("Setting cpu %d pmcr to %016lX\n",
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raw_smp_processor_id(), val);
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set_pmspr(SPRN_PMCR, val);
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}
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/*
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* get_nominal_index: Returns the index corresponding to the nominal
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* pstate in the cpufreq table
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*/
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static inline unsigned int get_nominal_index(void)
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{
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return powernv_pstate_info.max - powernv_pstate_info.nominal;
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}
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static void powernv_cpufreq_throttle_check(void *data)
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{
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unsigned int cpu = smp_processor_id();
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unsigned long pmsr;
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int pmsr_pmax, i;
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pmsr = get_pmspr(SPRN_PMSR);
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for (i = 0; i < nr_chips; i++)
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if (chips[i].id == cpu_to_chip_id(cpu))
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break;
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/* Check for Pmax Capping */
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pmsr_pmax = (s8)PMSR_MAX(pmsr);
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if (pmsr_pmax != powernv_pstate_info.max) {
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if (chips[i].throttled)
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goto next;
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chips[i].throttled = true;
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if (pmsr_pmax < powernv_pstate_info.nominal)
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pr_crit("CPU %d on Chip %u has Pmax reduced below nominal frequency (%d < %d)\n",
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cpu, chips[i].id, pmsr_pmax,
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powernv_pstate_info.nominal);
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else
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pr_info("CPU %d on Chip %u has Pmax reduced below turbo frequency (%d < %d)\n",
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cpu, chips[i].id, pmsr_pmax,
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powernv_pstate_info.max);
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} else if (chips[i].throttled) {
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chips[i].throttled = false;
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pr_info("CPU %d on Chip %u has Pmax restored to %d\n", cpu,
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chips[i].id, pmsr_pmax);
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}
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/* Check if Psafe_mode_active is set in PMSR. */
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next:
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if (pmsr & PMSR_PSAFE_ENABLE) {
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throttled = true;
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pr_info("Pstate set to safe frequency\n");
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}
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/* Check if SPR_EM_DISABLE is set in PMSR */
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if (pmsr & PMSR_SPR_EM_DISABLE) {
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throttled = true;
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pr_info("Frequency Control disabled from OS\n");
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}
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if (throttled) {
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pr_info("PMSR = %16lx\n", pmsr);
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pr_crit("CPU Frequency could be throttled\n");
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}
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}
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/*
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* powernv_cpufreq_target_index: Sets the frequency corresponding to
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* the cpufreq table entry indexed by new_index on the cpus in the
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* mask policy->cpus
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*/
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static int powernv_cpufreq_target_index(struct cpufreq_policy *policy,
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unsigned int new_index)
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{
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struct powernv_smp_call_data freq_data;
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if (unlikely(rebooting) && new_index != get_nominal_index())
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return 0;
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if (!throttled)
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powernv_cpufreq_throttle_check(NULL);
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freq_data.pstate_id = powernv_freqs[new_index].driver_data;
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/*
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* Use smp_call_function to send IPI and execute the
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* mtspr on target CPU. We could do that without IPI
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* if current CPU is within policy->cpus (core)
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*/
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smp_call_function_any(policy->cpus, set_pstate, &freq_data, 1);
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return 0;
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}
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static int powernv_cpufreq_cpu_init(struct cpufreq_policy *policy)
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{
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int base, i;
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base = cpu_first_thread_sibling(policy->cpu);
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for (i = 0; i < threads_per_core; i++)
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cpumask_set_cpu(base + i, policy->cpus);
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return cpufreq_table_validate_and_show(policy, powernv_freqs);
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}
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static int powernv_cpufreq_reboot_notifier(struct notifier_block *nb,
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unsigned long action, void *unused)
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{
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int cpu;
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struct cpufreq_policy cpu_policy;
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rebooting = true;
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for_each_online_cpu(cpu) {
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cpufreq_get_policy(&cpu_policy, cpu);
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powernv_cpufreq_target_index(&cpu_policy, get_nominal_index());
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}
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return NOTIFY_DONE;
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}
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static struct notifier_block powernv_cpufreq_reboot_nb = {
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.notifier_call = powernv_cpufreq_reboot_notifier,
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};
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void powernv_cpufreq_work_fn(struct work_struct *work)
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{
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struct chip *chip = container_of(work, struct chip, throttle);
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unsigned int cpu;
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cpumask_var_t mask;
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smp_call_function_any(&chip->mask,
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powernv_cpufreq_throttle_check, NULL, 0);
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if (!chip->restore)
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return;
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chip->restore = false;
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cpumask_copy(mask, &chip->mask);
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for_each_cpu_and(cpu, mask, cpu_online_mask) {
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int index, tcpu;
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struct cpufreq_policy policy;
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cpufreq_get_policy(&policy, cpu);
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cpufreq_frequency_table_target(&policy, policy.freq_table,
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policy.cur,
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CPUFREQ_RELATION_C, &index);
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powernv_cpufreq_target_index(&policy, index);
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for_each_cpu(tcpu, policy.cpus)
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cpumask_clear_cpu(tcpu, mask);
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}
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}
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static char throttle_reason[][30] = {
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"No throttling",
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"Power Cap",
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"Processor Over Temperature",
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"Power Supply Failure",
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"Over Current",
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"OCC Reset"
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};
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static int powernv_cpufreq_occ_msg(struct notifier_block *nb,
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unsigned long msg_type, void *_msg)
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{
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struct opal_msg *msg = _msg;
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struct opal_occ_msg omsg;
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int i;
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if (msg_type != OPAL_MSG_OCC)
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return 0;
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omsg.type = be64_to_cpu(msg->params[0]);
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switch (omsg.type) {
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case OCC_RESET:
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occ_reset = true;
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pr_info("OCC (On Chip Controller - enforces hard thermal/power limits) Resetting\n");
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/*
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* powernv_cpufreq_throttle_check() is called in
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* target() callback which can detect the throttle state
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* for governors like ondemand.
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* But static governors will not call target() often thus
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* report throttling here.
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*/
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if (!throttled) {
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throttled = true;
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pr_crit("CPU frequency is throttled for duration\n");
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}
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break;
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case OCC_LOAD:
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pr_info("OCC Loading, CPU frequency is throttled until OCC is started\n");
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break;
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case OCC_THROTTLE:
|
|
omsg.chip = be64_to_cpu(msg->params[1]);
|
|
omsg.throttle_status = be64_to_cpu(msg->params[2]);
|
|
|
|
if (occ_reset) {
|
|
occ_reset = false;
|
|
throttled = false;
|
|
pr_info("OCC Active, CPU frequency is no longer throttled\n");
|
|
|
|
for (i = 0; i < nr_chips; i++) {
|
|
chips[i].restore = true;
|
|
schedule_work(&chips[i].throttle);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
if (omsg.throttle_status &&
|
|
omsg.throttle_status <= OCC_MAX_THROTTLE_STATUS)
|
|
pr_info("OCC: Chip %u Pmax reduced due to %s\n",
|
|
(unsigned int)omsg.chip,
|
|
throttle_reason[omsg.throttle_status]);
|
|
else if (!omsg.throttle_status)
|
|
pr_info("OCC: Chip %u %s\n", (unsigned int)omsg.chip,
|
|
throttle_reason[omsg.throttle_status]);
|
|
else
|
|
return 0;
|
|
|
|
for (i = 0; i < nr_chips; i++)
|
|
if (chips[i].id == omsg.chip) {
|
|
if (!omsg.throttle_status)
|
|
chips[i].restore = true;
|
|
schedule_work(&chips[i].throttle);
|
|
}
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static struct notifier_block powernv_cpufreq_opal_nb = {
|
|
.notifier_call = powernv_cpufreq_occ_msg,
|
|
.next = NULL,
|
|
.priority = 0,
|
|
};
|
|
|
|
static void powernv_cpufreq_stop_cpu(struct cpufreq_policy *policy)
|
|
{
|
|
struct powernv_smp_call_data freq_data;
|
|
|
|
freq_data.pstate_id = powernv_pstate_info.min;
|
|
smp_call_function_single(policy->cpu, set_pstate, &freq_data, 1);
|
|
}
|
|
|
|
static struct cpufreq_driver powernv_cpufreq_driver = {
|
|
.name = "powernv-cpufreq",
|
|
.flags = CPUFREQ_CONST_LOOPS,
|
|
.init = powernv_cpufreq_cpu_init,
|
|
.verify = cpufreq_generic_frequency_table_verify,
|
|
.target_index = powernv_cpufreq_target_index,
|
|
.get = powernv_cpufreq_get,
|
|
.stop_cpu = powernv_cpufreq_stop_cpu,
|
|
.attr = powernv_cpu_freq_attr,
|
|
};
|
|
|
|
static int init_chip_info(void)
|
|
{
|
|
unsigned int chip[256];
|
|
unsigned int cpu, i;
|
|
unsigned int prev_chip_id = UINT_MAX;
|
|
|
|
for_each_possible_cpu(cpu) {
|
|
unsigned int id = cpu_to_chip_id(cpu);
|
|
|
|
if (prev_chip_id != id) {
|
|
prev_chip_id = id;
|
|
chip[nr_chips++] = id;
|
|
}
|
|
}
|
|
|
|
chips = kmalloc_array(nr_chips, sizeof(struct chip), GFP_KERNEL);
|
|
if (!chips)
|
|
return -ENOMEM;
|
|
|
|
for (i = 0; i < nr_chips; i++) {
|
|
chips[i].id = chip[i];
|
|
chips[i].throttled = false;
|
|
cpumask_copy(&chips[i].mask, cpumask_of_node(chip[i]));
|
|
INIT_WORK(&chips[i].throttle, powernv_cpufreq_work_fn);
|
|
chips[i].restore = false;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int __init powernv_cpufreq_init(void)
|
|
{
|
|
int rc = 0;
|
|
|
|
/* Don't probe on pseries (guest) platforms */
|
|
if (!firmware_has_feature(FW_FEATURE_OPAL))
|
|
return -ENODEV;
|
|
|
|
/* Discover pstates from device tree and init */
|
|
rc = init_powernv_pstates();
|
|
if (rc) {
|
|
pr_info("powernv-cpufreq disabled. System does not support PState control\n");
|
|
return rc;
|
|
}
|
|
|
|
/* Populate chip info */
|
|
rc = init_chip_info();
|
|
if (rc)
|
|
return rc;
|
|
|
|
register_reboot_notifier(&powernv_cpufreq_reboot_nb);
|
|
opal_message_notifier_register(OPAL_MSG_OCC, &powernv_cpufreq_opal_nb);
|
|
return cpufreq_register_driver(&powernv_cpufreq_driver);
|
|
}
|
|
module_init(powernv_cpufreq_init);
|
|
|
|
static void __exit powernv_cpufreq_exit(void)
|
|
{
|
|
unregister_reboot_notifier(&powernv_cpufreq_reboot_nb);
|
|
opal_message_notifier_unregister(OPAL_MSG_OCC,
|
|
&powernv_cpufreq_opal_nb);
|
|
cpufreq_unregister_driver(&powernv_cpufreq_driver);
|
|
}
|
|
module_exit(powernv_cpufreq_exit);
|
|
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_AUTHOR("Vaidyanathan Srinivasan <svaidy at linux.vnet.ibm.com>");
|