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![Feng Wu](/assets/img/avatar_default.png)
This patch adds the registration/unregistration of an irq_bypass_producer for MSI/MSIx on vfio pci devices. Acked-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Feng Wu <feng.wu@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
684 lines
16 KiB
C
684 lines
16 KiB
C
/*
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* VFIO PCI interrupt handling
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*
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* Copyright (C) 2012 Red Hat, Inc. All rights reserved.
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* Author: Alex Williamson <alex.williamson@redhat.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Derived from original vfio:
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* Copyright 2010 Cisco Systems, Inc. All rights reserved.
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* Author: Tom Lyon, pugs@cisco.com
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*/
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#include <linux/device.h>
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#include <linux/interrupt.h>
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#include <linux/eventfd.h>
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#include <linux/msi.h>
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#include <linux/pci.h>
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#include <linux/file.h>
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#include <linux/vfio.h>
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#include <linux/wait.h>
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#include <linux/slab.h>
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#include "vfio_pci_private.h"
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/*
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* INTx
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*/
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static void vfio_send_intx_eventfd(void *opaque, void *unused)
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{
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struct vfio_pci_device *vdev = opaque;
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if (likely(is_intx(vdev) && !vdev->virq_disabled))
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eventfd_signal(vdev->ctx[0].trigger, 1);
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}
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void vfio_pci_intx_mask(struct vfio_pci_device *vdev)
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{
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struct pci_dev *pdev = vdev->pdev;
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unsigned long flags;
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spin_lock_irqsave(&vdev->irqlock, flags);
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/*
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* Masking can come from interrupt, ioctl, or config space
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* via INTx disable. The latter means this can get called
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* even when not using intx delivery. In this case, just
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* try to have the physical bit follow the virtual bit.
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*/
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if (unlikely(!is_intx(vdev))) {
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if (vdev->pci_2_3)
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pci_intx(pdev, 0);
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} else if (!vdev->ctx[0].masked) {
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/*
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* Can't use check_and_mask here because we always want to
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* mask, not just when something is pending.
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*/
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if (vdev->pci_2_3)
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pci_intx(pdev, 0);
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else
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disable_irq_nosync(pdev->irq);
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vdev->ctx[0].masked = true;
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}
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spin_unlock_irqrestore(&vdev->irqlock, flags);
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}
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/*
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* If this is triggered by an eventfd, we can't call eventfd_signal
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* or else we'll deadlock on the eventfd wait queue. Return >0 when
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* a signal is necessary, which can then be handled via a work queue
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* or directly depending on the caller.
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*/
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static int vfio_pci_intx_unmask_handler(void *opaque, void *unused)
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{
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struct vfio_pci_device *vdev = opaque;
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struct pci_dev *pdev = vdev->pdev;
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unsigned long flags;
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int ret = 0;
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spin_lock_irqsave(&vdev->irqlock, flags);
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/*
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* Unmasking comes from ioctl or config, so again, have the
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* physical bit follow the virtual even when not using INTx.
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*/
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if (unlikely(!is_intx(vdev))) {
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if (vdev->pci_2_3)
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pci_intx(pdev, 1);
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} else if (vdev->ctx[0].masked && !vdev->virq_disabled) {
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/*
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* A pending interrupt here would immediately trigger,
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* but we can avoid that overhead by just re-sending
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* the interrupt to the user.
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*/
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if (vdev->pci_2_3) {
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if (!pci_check_and_unmask_intx(pdev))
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ret = 1;
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} else
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enable_irq(pdev->irq);
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vdev->ctx[0].masked = (ret > 0);
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}
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spin_unlock_irqrestore(&vdev->irqlock, flags);
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return ret;
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}
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void vfio_pci_intx_unmask(struct vfio_pci_device *vdev)
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{
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if (vfio_pci_intx_unmask_handler(vdev, NULL) > 0)
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vfio_send_intx_eventfd(vdev, NULL);
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}
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static irqreturn_t vfio_intx_handler(int irq, void *dev_id)
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{
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struct vfio_pci_device *vdev = dev_id;
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unsigned long flags;
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int ret = IRQ_NONE;
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spin_lock_irqsave(&vdev->irqlock, flags);
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if (!vdev->pci_2_3) {
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disable_irq_nosync(vdev->pdev->irq);
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vdev->ctx[0].masked = true;
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ret = IRQ_HANDLED;
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} else if (!vdev->ctx[0].masked && /* may be shared */
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pci_check_and_mask_intx(vdev->pdev)) {
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vdev->ctx[0].masked = true;
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ret = IRQ_HANDLED;
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}
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spin_unlock_irqrestore(&vdev->irqlock, flags);
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if (ret == IRQ_HANDLED)
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vfio_send_intx_eventfd(vdev, NULL);
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return ret;
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}
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static int vfio_intx_enable(struct vfio_pci_device *vdev)
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{
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if (!is_irq_none(vdev))
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return -EINVAL;
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if (!vdev->pdev->irq)
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return -ENODEV;
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vdev->ctx = kzalloc(sizeof(struct vfio_pci_irq_ctx), GFP_KERNEL);
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if (!vdev->ctx)
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return -ENOMEM;
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vdev->num_ctx = 1;
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/*
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* If the virtual interrupt is masked, restore it. Devices
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* supporting DisINTx can be masked at the hardware level
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* here, non-PCI-2.3 devices will have to wait until the
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* interrupt is enabled.
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*/
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vdev->ctx[0].masked = vdev->virq_disabled;
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if (vdev->pci_2_3)
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pci_intx(vdev->pdev, !vdev->ctx[0].masked);
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vdev->irq_type = VFIO_PCI_INTX_IRQ_INDEX;
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return 0;
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}
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static int vfio_intx_set_signal(struct vfio_pci_device *vdev, int fd)
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{
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struct pci_dev *pdev = vdev->pdev;
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unsigned long irqflags = IRQF_SHARED;
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struct eventfd_ctx *trigger;
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unsigned long flags;
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int ret;
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if (vdev->ctx[0].trigger) {
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free_irq(pdev->irq, vdev);
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kfree(vdev->ctx[0].name);
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eventfd_ctx_put(vdev->ctx[0].trigger);
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vdev->ctx[0].trigger = NULL;
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}
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if (fd < 0) /* Disable only */
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return 0;
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vdev->ctx[0].name = kasprintf(GFP_KERNEL, "vfio-intx(%s)",
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pci_name(pdev));
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if (!vdev->ctx[0].name)
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return -ENOMEM;
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trigger = eventfd_ctx_fdget(fd);
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if (IS_ERR(trigger)) {
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kfree(vdev->ctx[0].name);
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return PTR_ERR(trigger);
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}
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vdev->ctx[0].trigger = trigger;
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if (!vdev->pci_2_3)
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irqflags = 0;
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ret = request_irq(pdev->irq, vfio_intx_handler,
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irqflags, vdev->ctx[0].name, vdev);
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if (ret) {
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vdev->ctx[0].trigger = NULL;
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kfree(vdev->ctx[0].name);
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eventfd_ctx_put(trigger);
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return ret;
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}
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/*
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* INTx disable will stick across the new irq setup,
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* disable_irq won't.
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*/
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spin_lock_irqsave(&vdev->irqlock, flags);
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if (!vdev->pci_2_3 && vdev->ctx[0].masked)
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disable_irq_nosync(pdev->irq);
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spin_unlock_irqrestore(&vdev->irqlock, flags);
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return 0;
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}
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static void vfio_intx_disable(struct vfio_pci_device *vdev)
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{
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vfio_intx_set_signal(vdev, -1);
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vfio_virqfd_disable(&vdev->ctx[0].unmask);
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vfio_virqfd_disable(&vdev->ctx[0].mask);
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vdev->irq_type = VFIO_PCI_NUM_IRQS;
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vdev->num_ctx = 0;
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kfree(vdev->ctx);
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}
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/*
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* MSI/MSI-X
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*/
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static irqreturn_t vfio_msihandler(int irq, void *arg)
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{
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struct eventfd_ctx *trigger = arg;
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eventfd_signal(trigger, 1);
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return IRQ_HANDLED;
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}
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static int vfio_msi_enable(struct vfio_pci_device *vdev, int nvec, bool msix)
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{
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struct pci_dev *pdev = vdev->pdev;
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int ret;
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if (!is_irq_none(vdev))
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return -EINVAL;
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vdev->ctx = kzalloc(nvec * sizeof(struct vfio_pci_irq_ctx), GFP_KERNEL);
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if (!vdev->ctx)
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return -ENOMEM;
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if (msix) {
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int i;
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vdev->msix = kzalloc(nvec * sizeof(struct msix_entry),
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GFP_KERNEL);
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if (!vdev->msix) {
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kfree(vdev->ctx);
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return -ENOMEM;
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}
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for (i = 0; i < nvec; i++)
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vdev->msix[i].entry = i;
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ret = pci_enable_msix_range(pdev, vdev->msix, 1, nvec);
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if (ret < nvec) {
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if (ret > 0)
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pci_disable_msix(pdev);
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kfree(vdev->msix);
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kfree(vdev->ctx);
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return ret;
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}
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} else {
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ret = pci_enable_msi_range(pdev, 1, nvec);
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if (ret < nvec) {
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if (ret > 0)
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pci_disable_msi(pdev);
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kfree(vdev->ctx);
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return ret;
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}
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}
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vdev->num_ctx = nvec;
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vdev->irq_type = msix ? VFIO_PCI_MSIX_IRQ_INDEX :
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VFIO_PCI_MSI_IRQ_INDEX;
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if (!msix) {
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/*
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* Compute the virtual hardware field for max msi vectors -
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* it is the log base 2 of the number of vectors.
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*/
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vdev->msi_qmax = fls(nvec * 2 - 1) - 1;
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}
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return 0;
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}
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static int vfio_msi_set_vector_signal(struct vfio_pci_device *vdev,
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int vector, int fd, bool msix)
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{
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struct pci_dev *pdev = vdev->pdev;
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int irq = msix ? vdev->msix[vector].vector : pdev->irq + vector;
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char *name = msix ? "vfio-msix" : "vfio-msi";
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struct eventfd_ctx *trigger;
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int ret;
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if (vector >= vdev->num_ctx)
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return -EINVAL;
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if (vdev->ctx[vector].trigger) {
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free_irq(irq, vdev->ctx[vector].trigger);
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irq_bypass_unregister_producer(&vdev->ctx[vector].producer);
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kfree(vdev->ctx[vector].name);
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eventfd_ctx_put(vdev->ctx[vector].trigger);
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vdev->ctx[vector].trigger = NULL;
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}
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if (fd < 0)
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return 0;
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vdev->ctx[vector].name = kasprintf(GFP_KERNEL, "%s[%d](%s)",
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name, vector, pci_name(pdev));
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if (!vdev->ctx[vector].name)
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return -ENOMEM;
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trigger = eventfd_ctx_fdget(fd);
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if (IS_ERR(trigger)) {
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kfree(vdev->ctx[vector].name);
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return PTR_ERR(trigger);
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}
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/*
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* The MSIx vector table resides in device memory which may be cleared
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* via backdoor resets. We don't allow direct access to the vector
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* table so even if a userspace driver attempts to save/restore around
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* such a reset it would be unsuccessful. To avoid this, restore the
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* cached value of the message prior to enabling.
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*/
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if (msix) {
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struct msi_msg msg;
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get_cached_msi_msg(irq, &msg);
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pci_write_msi_msg(irq, &msg);
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}
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ret = request_irq(irq, vfio_msihandler, 0,
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vdev->ctx[vector].name, trigger);
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if (ret) {
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kfree(vdev->ctx[vector].name);
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eventfd_ctx_put(trigger);
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return ret;
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}
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vdev->ctx[vector].producer.token = trigger;
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vdev->ctx[vector].producer.irq = irq;
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ret = irq_bypass_register_producer(&vdev->ctx[vector].producer);
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if (unlikely(ret))
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dev_info(&pdev->dev,
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"irq bypass producer (token %p) registration fails: %d\n",
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vdev->ctx[vector].producer.token, ret);
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vdev->ctx[vector].trigger = trigger;
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return 0;
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}
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static int vfio_msi_set_block(struct vfio_pci_device *vdev, unsigned start,
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unsigned count, int32_t *fds, bool msix)
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{
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int i, j, ret = 0;
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if (start + count > vdev->num_ctx)
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return -EINVAL;
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for (i = 0, j = start; i < count && !ret; i++, j++) {
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int fd = fds ? fds[i] : -1;
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ret = vfio_msi_set_vector_signal(vdev, j, fd, msix);
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}
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if (ret) {
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for (--j; j >= start; j--)
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vfio_msi_set_vector_signal(vdev, j, -1, msix);
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}
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return ret;
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}
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static void vfio_msi_disable(struct vfio_pci_device *vdev, bool msix)
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{
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struct pci_dev *pdev = vdev->pdev;
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int i;
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vfio_msi_set_block(vdev, 0, vdev->num_ctx, NULL, msix);
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for (i = 0; i < vdev->num_ctx; i++) {
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vfio_virqfd_disable(&vdev->ctx[i].unmask);
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vfio_virqfd_disable(&vdev->ctx[i].mask);
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}
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if (msix) {
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pci_disable_msix(vdev->pdev);
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kfree(vdev->msix);
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} else
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pci_disable_msi(pdev);
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vdev->irq_type = VFIO_PCI_NUM_IRQS;
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vdev->num_ctx = 0;
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kfree(vdev->ctx);
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}
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/*
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* IOCTL support
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*/
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static int vfio_pci_set_intx_unmask(struct vfio_pci_device *vdev,
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unsigned index, unsigned start,
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unsigned count, uint32_t flags, void *data)
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{
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if (!is_intx(vdev) || start != 0 || count != 1)
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return -EINVAL;
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if (flags & VFIO_IRQ_SET_DATA_NONE) {
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vfio_pci_intx_unmask(vdev);
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} else if (flags & VFIO_IRQ_SET_DATA_BOOL) {
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uint8_t unmask = *(uint8_t *)data;
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if (unmask)
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vfio_pci_intx_unmask(vdev);
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} else if (flags & VFIO_IRQ_SET_DATA_EVENTFD) {
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int32_t fd = *(int32_t *)data;
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if (fd >= 0)
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return vfio_virqfd_enable((void *) vdev,
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vfio_pci_intx_unmask_handler,
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vfio_send_intx_eventfd, NULL,
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&vdev->ctx[0].unmask, fd);
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vfio_virqfd_disable(&vdev->ctx[0].unmask);
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}
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return 0;
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}
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static int vfio_pci_set_intx_mask(struct vfio_pci_device *vdev,
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unsigned index, unsigned start,
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unsigned count, uint32_t flags, void *data)
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{
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if (!is_intx(vdev) || start != 0 || count != 1)
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return -EINVAL;
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if (flags & VFIO_IRQ_SET_DATA_NONE) {
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vfio_pci_intx_mask(vdev);
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} else if (flags & VFIO_IRQ_SET_DATA_BOOL) {
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uint8_t mask = *(uint8_t *)data;
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if (mask)
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vfio_pci_intx_mask(vdev);
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} else if (flags & VFIO_IRQ_SET_DATA_EVENTFD) {
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return -ENOTTY; /* XXX implement me */
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}
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return 0;
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}
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static int vfio_pci_set_intx_trigger(struct vfio_pci_device *vdev,
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unsigned index, unsigned start,
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unsigned count, uint32_t flags, void *data)
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{
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if (is_intx(vdev) && !count && (flags & VFIO_IRQ_SET_DATA_NONE)) {
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vfio_intx_disable(vdev);
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return 0;
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}
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if (!(is_intx(vdev) || is_irq_none(vdev)) || start != 0 || count != 1)
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return -EINVAL;
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if (flags & VFIO_IRQ_SET_DATA_EVENTFD) {
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int32_t fd = *(int32_t *)data;
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int ret;
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if (is_intx(vdev))
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return vfio_intx_set_signal(vdev, fd);
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ret = vfio_intx_enable(vdev);
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if (ret)
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return ret;
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ret = vfio_intx_set_signal(vdev, fd);
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if (ret)
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vfio_intx_disable(vdev);
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return ret;
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}
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if (!is_intx(vdev))
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return -EINVAL;
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if (flags & VFIO_IRQ_SET_DATA_NONE) {
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vfio_send_intx_eventfd(vdev, NULL);
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|
} else if (flags & VFIO_IRQ_SET_DATA_BOOL) {
|
|
uint8_t trigger = *(uint8_t *)data;
|
|
if (trigger)
|
|
vfio_send_intx_eventfd(vdev, NULL);
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static int vfio_pci_set_msi_trigger(struct vfio_pci_device *vdev,
|
|
unsigned index, unsigned start,
|
|
unsigned count, uint32_t flags, void *data)
|
|
{
|
|
int i;
|
|
bool msix = (index == VFIO_PCI_MSIX_IRQ_INDEX) ? true : false;
|
|
|
|
if (irq_is(vdev, index) && !count && (flags & VFIO_IRQ_SET_DATA_NONE)) {
|
|
vfio_msi_disable(vdev, msix);
|
|
return 0;
|
|
}
|
|
|
|
if (!(irq_is(vdev, index) || is_irq_none(vdev)))
|
|
return -EINVAL;
|
|
|
|
if (flags & VFIO_IRQ_SET_DATA_EVENTFD) {
|
|
int32_t *fds = data;
|
|
int ret;
|
|
|
|
if (vdev->irq_type == index)
|
|
return vfio_msi_set_block(vdev, start, count,
|
|
fds, msix);
|
|
|
|
ret = vfio_msi_enable(vdev, start + count, msix);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = vfio_msi_set_block(vdev, start, count, fds, msix);
|
|
if (ret)
|
|
vfio_msi_disable(vdev, msix);
|
|
|
|
return ret;
|
|
}
|
|
|
|
if (!irq_is(vdev, index) || start + count > vdev->num_ctx)
|
|
return -EINVAL;
|
|
|
|
for (i = start; i < start + count; i++) {
|
|
if (!vdev->ctx[i].trigger)
|
|
continue;
|
|
if (flags & VFIO_IRQ_SET_DATA_NONE) {
|
|
eventfd_signal(vdev->ctx[i].trigger, 1);
|
|
} else if (flags & VFIO_IRQ_SET_DATA_BOOL) {
|
|
uint8_t *bools = data;
|
|
if (bools[i - start])
|
|
eventfd_signal(vdev->ctx[i].trigger, 1);
|
|
}
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static int vfio_pci_set_ctx_trigger_single(struct eventfd_ctx **ctx,
|
|
uint32_t flags, void *data)
|
|
{
|
|
int32_t fd = *(int32_t *)data;
|
|
|
|
if (!(flags & VFIO_IRQ_SET_DATA_TYPE_MASK))
|
|
return -EINVAL;
|
|
|
|
/* DATA_NONE/DATA_BOOL enables loopback testing */
|
|
if (flags & VFIO_IRQ_SET_DATA_NONE) {
|
|
if (*ctx)
|
|
eventfd_signal(*ctx, 1);
|
|
return 0;
|
|
} else if (flags & VFIO_IRQ_SET_DATA_BOOL) {
|
|
uint8_t trigger = *(uint8_t *)data;
|
|
if (trigger && *ctx)
|
|
eventfd_signal(*ctx, 1);
|
|
return 0;
|
|
}
|
|
|
|
/* Handle SET_DATA_EVENTFD */
|
|
if (fd == -1) {
|
|
if (*ctx)
|
|
eventfd_ctx_put(*ctx);
|
|
*ctx = NULL;
|
|
return 0;
|
|
} else if (fd >= 0) {
|
|
struct eventfd_ctx *efdctx;
|
|
efdctx = eventfd_ctx_fdget(fd);
|
|
if (IS_ERR(efdctx))
|
|
return PTR_ERR(efdctx);
|
|
if (*ctx)
|
|
eventfd_ctx_put(*ctx);
|
|
*ctx = efdctx;
|
|
return 0;
|
|
} else
|
|
return -EINVAL;
|
|
}
|
|
|
|
static int vfio_pci_set_err_trigger(struct vfio_pci_device *vdev,
|
|
unsigned index, unsigned start,
|
|
unsigned count, uint32_t flags, void *data)
|
|
{
|
|
if (index != VFIO_PCI_ERR_IRQ_INDEX)
|
|
return -EINVAL;
|
|
|
|
/*
|
|
* We should sanitize start & count, but that wasn't caught
|
|
* originally, so this IRQ index must forever ignore them :-(
|
|
*/
|
|
|
|
return vfio_pci_set_ctx_trigger_single(&vdev->err_trigger, flags, data);
|
|
}
|
|
|
|
static int vfio_pci_set_req_trigger(struct vfio_pci_device *vdev,
|
|
unsigned index, unsigned start,
|
|
unsigned count, uint32_t flags, void *data)
|
|
{
|
|
if (index != VFIO_PCI_REQ_IRQ_INDEX || start != 0 || count != 1)
|
|
return -EINVAL;
|
|
|
|
return vfio_pci_set_ctx_trigger_single(&vdev->req_trigger, flags, data);
|
|
}
|
|
|
|
int vfio_pci_set_irqs_ioctl(struct vfio_pci_device *vdev, uint32_t flags,
|
|
unsigned index, unsigned start, unsigned count,
|
|
void *data)
|
|
{
|
|
int (*func)(struct vfio_pci_device *vdev, unsigned index,
|
|
unsigned start, unsigned count, uint32_t flags,
|
|
void *data) = NULL;
|
|
|
|
switch (index) {
|
|
case VFIO_PCI_INTX_IRQ_INDEX:
|
|
switch (flags & VFIO_IRQ_SET_ACTION_TYPE_MASK) {
|
|
case VFIO_IRQ_SET_ACTION_MASK:
|
|
func = vfio_pci_set_intx_mask;
|
|
break;
|
|
case VFIO_IRQ_SET_ACTION_UNMASK:
|
|
func = vfio_pci_set_intx_unmask;
|
|
break;
|
|
case VFIO_IRQ_SET_ACTION_TRIGGER:
|
|
func = vfio_pci_set_intx_trigger;
|
|
break;
|
|
}
|
|
break;
|
|
case VFIO_PCI_MSI_IRQ_INDEX:
|
|
case VFIO_PCI_MSIX_IRQ_INDEX:
|
|
switch (flags & VFIO_IRQ_SET_ACTION_TYPE_MASK) {
|
|
case VFIO_IRQ_SET_ACTION_MASK:
|
|
case VFIO_IRQ_SET_ACTION_UNMASK:
|
|
/* XXX Need masking support exported */
|
|
break;
|
|
case VFIO_IRQ_SET_ACTION_TRIGGER:
|
|
func = vfio_pci_set_msi_trigger;
|
|
break;
|
|
}
|
|
break;
|
|
case VFIO_PCI_ERR_IRQ_INDEX:
|
|
switch (flags & VFIO_IRQ_SET_ACTION_TYPE_MASK) {
|
|
case VFIO_IRQ_SET_ACTION_TRIGGER:
|
|
if (pci_is_pcie(vdev->pdev))
|
|
func = vfio_pci_set_err_trigger;
|
|
break;
|
|
}
|
|
break;
|
|
case VFIO_PCI_REQ_IRQ_INDEX:
|
|
switch (flags & VFIO_IRQ_SET_ACTION_TYPE_MASK) {
|
|
case VFIO_IRQ_SET_ACTION_TRIGGER:
|
|
func = vfio_pci_set_req_trigger;
|
|
break;
|
|
}
|
|
break;
|
|
}
|
|
|
|
if (!func)
|
|
return -ENOTTY;
|
|
|
|
return func(vdev, index, start, count, flags, data);
|
|
}
|