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![Hoegeun Kwon](/assets/img/avatar_default.png)
This patch adds MIPI-DSI based S6E63J0X03 AMOLED LCD panel driver which uses MIPI DSI bus to communicate with panel. The panel has 320×320 resolution in 1.63" physical panel. This panel is used in Samsung Galaxy Gear 2. Signed-off-by: Inki Dae <inki.dae@samsung.com> Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com> Signed-off-by: Hoegeun Kwon <hoegeun.kwon@samsung.com> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/1499912443-3671-3-git-send-email-hoegeun.kwon@samsung.com
532 lines
12 KiB
C
532 lines
12 KiB
C
/*
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* MIPI-DSI based S6E63J0X03 AMOLED lcd 1.63 inch panel driver.
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*
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* Copyright (c) 2014-2017 Samsung Electronics Co., Ltd
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*
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* Inki Dae <inki.dae@samsung.com>
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* Hoegeun Kwon <hoegeun.kwon@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <drm/drmP.h>
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#include <drm/drm_mipi_dsi.h>
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#include <drm/drm_panel.h>
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#include <linux/backlight.h>
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#include <linux/gpio/consumer.h>
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#include <linux/regulator/consumer.h>
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#include <video/mipi_display.h>
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#define MCS_LEVEL2_KEY 0xf0
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#define MCS_MTP_KEY 0xf1
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#define MCS_MTP_SET3 0xd4
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#define MAX_BRIGHTNESS 100
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#define DEFAULT_BRIGHTNESS 80
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#define NUM_GAMMA_STEPS 9
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#define GAMMA_CMD_CNT 28
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#define FIRST_COLUMN 20
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struct s6e63j0x03 {
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struct device *dev;
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struct drm_panel panel;
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struct backlight_device *bl_dev;
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struct regulator_bulk_data supplies[2];
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struct gpio_desc *reset_gpio;
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};
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static const struct drm_display_mode default_mode = {
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.clock = 4649,
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.hdisplay = 320,
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.hsync_start = 320 + 1,
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.hsync_end = 320 + 1 + 1,
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.htotal = 320 + 1 + 1 + 1,
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.vdisplay = 320,
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.vsync_start = 320 + 150,
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.vsync_end = 320 + 150 + 1,
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.vtotal = 320 + 150 + 1 + 2,
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.vrefresh = 30,
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.flags = 0,
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};
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static const unsigned char gamma_tbl[NUM_GAMMA_STEPS][GAMMA_CMD_CNT] = {
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{ /* Gamma 10 */
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MCS_MTP_SET3,
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0x00, 0x00, 0x00, 0x7f, 0x7f, 0x7f, 0x52, 0x6b, 0x6f, 0x26,
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0x28, 0x2d, 0x28, 0x26, 0x27, 0x33, 0x34, 0x32, 0x36, 0x36,
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0x35, 0x00, 0xab, 0x00, 0xae, 0x00, 0xbf
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},
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{ /* gamma 30 */
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MCS_MTP_SET3,
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0x00, 0x00, 0x00, 0x70, 0x7f, 0x7f, 0x4e, 0x64, 0x69, 0x26,
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0x27, 0x2a, 0x28, 0x29, 0x27, 0x31, 0x32, 0x31, 0x35, 0x34,
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0x35, 0x00, 0xc4, 0x00, 0xca, 0x00, 0xdc
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},
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{ /* gamma 60 */
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MCS_MTP_SET3,
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0x00, 0x00, 0x00, 0x65, 0x7b, 0x7d, 0x5f, 0x67, 0x68, 0x2a,
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0x28, 0x29, 0x28, 0x2a, 0x27, 0x31, 0x2f, 0x30, 0x34, 0x33,
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0x34, 0x00, 0xd9, 0x00, 0xe4, 0x00, 0xf5
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},
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{ /* gamma 90 */
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MCS_MTP_SET3,
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0x00, 0x00, 0x00, 0x4d, 0x6f, 0x71, 0x67, 0x6a, 0x6c, 0x29,
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0x28, 0x28, 0x28, 0x29, 0x27, 0x30, 0x2e, 0x30, 0x32, 0x31,
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0x31, 0x00, 0xea, 0x00, 0xf6, 0x01, 0x09
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},
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{ /* gamma 120 */
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MCS_MTP_SET3,
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0x00, 0x00, 0x00, 0x3d, 0x66, 0x68, 0x69, 0x69, 0x69, 0x28,
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0x28, 0x27, 0x28, 0x28, 0x27, 0x30, 0x2e, 0x2f, 0x31, 0x31,
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0x30, 0x00, 0xf9, 0x01, 0x05, 0x01, 0x1b
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},
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{ /* gamma 150 */
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MCS_MTP_SET3,
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0x00, 0x00, 0x00, 0x31, 0x51, 0x53, 0x66, 0x66, 0x67, 0x28,
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0x29, 0x27, 0x28, 0x27, 0x27, 0x2e, 0x2d, 0x2e, 0x31, 0x31,
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0x30, 0x01, 0x04, 0x01, 0x11, 0x01, 0x29
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},
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{ /* gamma 200 */
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MCS_MTP_SET3,
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0x00, 0x00, 0x00, 0x2f, 0x4f, 0x51, 0x67, 0x65, 0x65, 0x29,
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0x2a, 0x28, 0x27, 0x25, 0x26, 0x2d, 0x2c, 0x2c, 0x30, 0x30,
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0x30, 0x01, 0x14, 0x01, 0x23, 0x01, 0x3b
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},
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{ /* gamma 240 */
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MCS_MTP_SET3,
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0x00, 0x00, 0x00, 0x2c, 0x4d, 0x50, 0x65, 0x63, 0x64, 0x2a,
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0x2c, 0x29, 0x26, 0x24, 0x25, 0x2c, 0x2b, 0x2b, 0x30, 0x30,
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0x30, 0x01, 0x1e, 0x01, 0x2f, 0x01, 0x47
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},
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{ /* gamma 300 */
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MCS_MTP_SET3,
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0x00, 0x00, 0x00, 0x38, 0x61, 0x64, 0x65, 0x63, 0x64, 0x28,
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0x2a, 0x27, 0x26, 0x23, 0x25, 0x2b, 0x2b, 0x2a, 0x30, 0x2f,
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0x30, 0x01, 0x2d, 0x01, 0x3f, 0x01, 0x57
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}
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};
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static inline struct s6e63j0x03 *panel_to_s6e63j0x03(struct drm_panel *panel)
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{
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return container_of(panel, struct s6e63j0x03, panel);
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}
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static inline ssize_t s6e63j0x03_dcs_write_seq(struct s6e63j0x03 *ctx,
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const void *seq, size_t len)
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{
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struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
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return mipi_dsi_dcs_write_buffer(dsi, seq, len);
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}
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#define s6e63j0x03_dcs_write_seq_static(ctx, seq...) \
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({ \
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static const u8 d[] = { seq }; \
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s6e63j0x03_dcs_write_seq(ctx, d, ARRAY_SIZE(d)); \
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})
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static inline int s6e63j0x03_enable_lv2_command(struct s6e63j0x03 *ctx)
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{
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return s6e63j0x03_dcs_write_seq_static(ctx, MCS_LEVEL2_KEY, 0x5a, 0x5a);
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}
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static inline int s6e63j0x03_apply_mtp_key(struct s6e63j0x03 *ctx, bool on)
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{
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if (on)
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return s6e63j0x03_dcs_write_seq_static(ctx,
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MCS_MTP_KEY, 0x5a, 0x5a);
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return s6e63j0x03_dcs_write_seq_static(ctx, MCS_MTP_KEY, 0xa5, 0xa5);
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}
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static int s6e63j0x03_power_on(struct s6e63j0x03 *ctx)
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{
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int ret;
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ret = regulator_bulk_enable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
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if (ret < 0)
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return ret;
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msleep(30);
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gpiod_set_value(ctx->reset_gpio, 1);
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usleep_range(1000, 2000);
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gpiod_set_value(ctx->reset_gpio, 0);
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usleep_range(5000, 6000);
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return 0;
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}
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static int s6e63j0x03_power_off(struct s6e63j0x03 *ctx)
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{
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return regulator_bulk_disable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
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}
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static unsigned int s6e63j0x03_get_brightness_index(unsigned int brightness)
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{
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unsigned int index;
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index = brightness / (MAX_BRIGHTNESS / NUM_GAMMA_STEPS);
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if (index >= NUM_GAMMA_STEPS)
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index = NUM_GAMMA_STEPS - 1;
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return index;
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}
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static int s6e63j0x03_update_gamma(struct s6e63j0x03 *ctx,
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unsigned int brightness)
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{
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struct backlight_device *bl_dev = ctx->bl_dev;
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unsigned int index = s6e63j0x03_get_brightness_index(brightness);
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int ret;
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ret = s6e63j0x03_apply_mtp_key(ctx, true);
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if (ret < 0)
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return ret;
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ret = s6e63j0x03_dcs_write_seq(ctx, gamma_tbl[index], GAMMA_CMD_CNT);
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if (ret < 0)
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return ret;
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ret = s6e63j0x03_apply_mtp_key(ctx, false);
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if (ret < 0)
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return ret;
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bl_dev->props.brightness = brightness;
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return 0;
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}
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static int s6e63j0x03_set_brightness(struct backlight_device *bl_dev)
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{
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struct s6e63j0x03 *ctx = bl_get_data(bl_dev);
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unsigned int brightness = bl_dev->props.brightness;
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return s6e63j0x03_update_gamma(ctx, brightness);
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}
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static const struct backlight_ops s6e63j0x03_bl_ops = {
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.update_status = s6e63j0x03_set_brightness,
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};
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static int s6e63j0x03_disable(struct drm_panel *panel)
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{
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struct s6e63j0x03 *ctx = panel_to_s6e63j0x03(panel);
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struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
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int ret;
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ret = mipi_dsi_dcs_set_display_off(dsi);
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if (ret < 0)
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return ret;
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ctx->bl_dev->props.power = FB_BLANK_NORMAL;
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ret = mipi_dsi_dcs_enter_sleep_mode(dsi);
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if (ret < 0)
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return ret;
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msleep(120);
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return 0;
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}
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static int s6e63j0x03_unprepare(struct drm_panel *panel)
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{
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struct s6e63j0x03 *ctx = panel_to_s6e63j0x03(panel);
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int ret;
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ret = s6e63j0x03_power_off(ctx);
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if (ret < 0)
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return ret;
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ctx->bl_dev->props.power = FB_BLANK_POWERDOWN;
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return 0;
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}
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static int s6e63j0x03_panel_init(struct s6e63j0x03 *ctx)
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{
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struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
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int ret;
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ret = s6e63j0x03_enable_lv2_command(ctx);
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if (ret < 0)
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return ret;
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ret = s6e63j0x03_apply_mtp_key(ctx, true);
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if (ret < 0)
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return ret;
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/* set porch adjustment */
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ret = s6e63j0x03_dcs_write_seq_static(ctx, 0xf2, 0x1c, 0x28);
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if (ret < 0)
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return ret;
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/* set frame freq */
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ret = s6e63j0x03_dcs_write_seq_static(ctx, 0xb5, 0x00, 0x02, 0x00);
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if (ret < 0)
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return ret;
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/* set caset, paset */
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ret = mipi_dsi_dcs_set_column_address(dsi, FIRST_COLUMN,
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default_mode.hdisplay - 1 + FIRST_COLUMN);
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if (ret < 0)
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return ret;
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ret = mipi_dsi_dcs_set_page_address(dsi, 0, default_mode.vdisplay - 1);
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if (ret < 0)
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return ret;
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/* set ltps timming 0, 1 */
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ret = s6e63j0x03_dcs_write_seq_static(ctx, 0xf8, 0x08, 0x08, 0x08, 0x17,
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0x00, 0x2a, 0x02, 0x26, 0x00, 0x00, 0x02, 0x00, 0x00);
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if (ret < 0)
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return ret;
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ret = s6e63j0x03_dcs_write_seq_static(ctx, 0xf7, 0x02);
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if (ret < 0)
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return ret;
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/* set param pos te_edge */
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ret = s6e63j0x03_dcs_write_seq_static(ctx, 0xb0, 0x01);
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if (ret < 0)
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return ret;
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/* set te rising edge */
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ret = s6e63j0x03_dcs_write_seq_static(ctx, 0xe2, 0x0f);
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if (ret < 0)
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return ret;
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/* set param pos default */
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ret = s6e63j0x03_dcs_write_seq_static(ctx, 0xb0, 0x00);
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if (ret < 0)
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return ret;
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ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
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if (ret < 0)
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return ret;
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ret = s6e63j0x03_apply_mtp_key(ctx, false);
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if (ret < 0)
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return ret;
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return 0;
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}
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static int s6e63j0x03_prepare(struct drm_panel *panel)
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{
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struct s6e63j0x03 *ctx = panel_to_s6e63j0x03(panel);
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int ret;
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ret = s6e63j0x03_power_on(ctx);
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if (ret < 0)
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return ret;
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ret = s6e63j0x03_panel_init(ctx);
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if (ret < 0)
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goto err;
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ctx->bl_dev->props.power = FB_BLANK_NORMAL;
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return 0;
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err:
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s6e63j0x03_power_off(ctx);
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return ret;
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}
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static int s6e63j0x03_enable(struct drm_panel *panel)
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{
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struct s6e63j0x03 *ctx = panel_to_s6e63j0x03(panel);
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struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
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int ret;
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msleep(120);
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ret = s6e63j0x03_apply_mtp_key(ctx, true);
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if (ret < 0)
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return ret;
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/* set elvss_cond */
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ret = s6e63j0x03_dcs_write_seq_static(ctx, 0xb1, 0x00, 0x09);
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if (ret < 0)
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return ret;
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/* set pos */
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ret = s6e63j0x03_dcs_write_seq_static(ctx,
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MIPI_DCS_SET_ADDRESS_MODE, 0x40);
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if (ret < 0)
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return ret;
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/* set default white brightness */
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ret = mipi_dsi_dcs_set_display_brightness(dsi, 0x00ff);
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if (ret < 0)
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return ret;
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/* set white ctrl */
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ret = s6e63j0x03_dcs_write_seq_static(ctx,
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MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x20);
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if (ret < 0)
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return ret;
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/* set acl off */
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ret = s6e63j0x03_dcs_write_seq_static(ctx,
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MIPI_DCS_WRITE_POWER_SAVE, 0x00);
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if (ret < 0)
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return ret;
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ret = mipi_dsi_dcs_set_tear_on(dsi, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
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if (ret < 0)
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return ret;
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ret = s6e63j0x03_apply_mtp_key(ctx, false);
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if (ret < 0)
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return ret;
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ret = mipi_dsi_dcs_set_display_on(dsi);
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if (ret < 0)
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return ret;
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ctx->bl_dev->props.power = FB_BLANK_UNBLANK;
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return 0;
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}
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static int s6e63j0x03_get_modes(struct drm_panel *panel)
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{
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struct drm_connector *connector = panel->connector;
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struct drm_display_mode *mode;
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mode = drm_mode_duplicate(panel->drm, &default_mode);
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if (!mode) {
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DRM_ERROR("failed to add mode %ux%ux@%u\n",
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default_mode.hdisplay, default_mode.vdisplay,
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default_mode.vrefresh);
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return -ENOMEM;
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}
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drm_mode_set_name(mode);
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mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
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drm_mode_probed_add(connector, mode);
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connector->display_info.width_mm = 29;
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connector->display_info.height_mm = 29;
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return 1;
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}
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static const struct drm_panel_funcs s6e63j0x03_funcs = {
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.disable = s6e63j0x03_disable,
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.unprepare = s6e63j0x03_unprepare,
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.prepare = s6e63j0x03_prepare,
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.enable = s6e63j0x03_enable,
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.get_modes = s6e63j0x03_get_modes,
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};
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static int s6e63j0x03_probe(struct mipi_dsi_device *dsi)
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{
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struct device *dev = &dsi->dev;
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struct s6e63j0x03 *ctx;
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int ret;
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ctx = devm_kzalloc(dev, sizeof(struct s6e63j0x03), GFP_KERNEL);
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if (!ctx)
|
|
return -ENOMEM;
|
|
|
|
mipi_dsi_set_drvdata(dsi, ctx);
|
|
|
|
ctx->dev = dev;
|
|
|
|
dsi->lanes = 1;
|
|
dsi->format = MIPI_DSI_FMT_RGB888;
|
|
dsi->mode_flags = MIPI_DSI_MODE_EOT_PACKET;
|
|
|
|
ctx->supplies[0].supply = "vdd3";
|
|
ctx->supplies[1].supply = "vci";
|
|
ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(ctx->supplies),
|
|
ctx->supplies);
|
|
if (ret < 0) {
|
|
dev_err(dev, "failed to get regulators: %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
|
|
if (IS_ERR(ctx->reset_gpio)) {
|
|
dev_err(dev, "cannot get reset-gpio: %ld\n",
|
|
PTR_ERR(ctx->reset_gpio));
|
|
return PTR_ERR(ctx->reset_gpio);
|
|
}
|
|
|
|
drm_panel_init(&ctx->panel);
|
|
ctx->panel.dev = dev;
|
|
ctx->panel.funcs = &s6e63j0x03_funcs;
|
|
|
|
ctx->bl_dev = backlight_device_register("s6e63j0x03", dev, ctx,
|
|
&s6e63j0x03_bl_ops, NULL);
|
|
if (IS_ERR(ctx->bl_dev)) {
|
|
dev_err(dev, "failed to register backlight device\n");
|
|
return PTR_ERR(ctx->bl_dev);
|
|
}
|
|
|
|
ctx->bl_dev->props.max_brightness = MAX_BRIGHTNESS;
|
|
ctx->bl_dev->props.brightness = DEFAULT_BRIGHTNESS;
|
|
ctx->bl_dev->props.power = FB_BLANK_POWERDOWN;
|
|
|
|
ret = drm_panel_add(&ctx->panel);
|
|
if (ret < 0)
|
|
goto unregister_backlight;
|
|
|
|
ret = mipi_dsi_attach(dsi);
|
|
if (ret < 0)
|
|
goto remove_panel;
|
|
|
|
return ret;
|
|
|
|
remove_panel:
|
|
drm_panel_remove(&ctx->panel);
|
|
|
|
unregister_backlight:
|
|
backlight_device_unregister(ctx->bl_dev);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int s6e63j0x03_remove(struct mipi_dsi_device *dsi)
|
|
{
|
|
struct s6e63j0x03 *ctx = mipi_dsi_get_drvdata(dsi);
|
|
|
|
mipi_dsi_detach(dsi);
|
|
drm_panel_remove(&ctx->panel);
|
|
|
|
backlight_device_unregister(ctx->bl_dev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct of_device_id s6e63j0x03_of_match[] = {
|
|
{ .compatible = "samsung,s6e63j0x03" },
|
|
{ }
|
|
};
|
|
MODULE_DEVICE_TABLE(of, s6e63j0x03_of_match);
|
|
|
|
static struct mipi_dsi_driver s6e63j0x03_driver = {
|
|
.probe = s6e63j0x03_probe,
|
|
.remove = s6e63j0x03_remove,
|
|
.driver = {
|
|
.name = "panel_samsung_s6e63j0x03",
|
|
.of_match_table = s6e63j0x03_of_match,
|
|
},
|
|
};
|
|
module_mipi_dsi_driver(s6e63j0x03_driver);
|
|
|
|
MODULE_AUTHOR("Inki Dae <inki.dae@samsung.com>");
|
|
MODULE_AUTHOR("Hoegeun Kwon <hoegeun.kwon@samsung.com>");
|
|
MODULE_DESCRIPTION("MIPI-DSI based s6e63j0x03 AMOLED LCD Panel Driver");
|
|
MODULE_LICENSE("GPL v2");
|