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![Dave Airlie](/assets/img/avatar_default.png)
The bulk of these changes are preparation work and addition of support for Tegra186. Currently only HDMI output (the primary output on Jetson TX2) is supported, but the hardware is also capable of doing DSI and DisplayPort. Tegra DRM now also uses the atomic commit helpers instead of the open- coded variant that was only doing half its job. As a bit of a byproduct of the Tegra186 support the driver also gained HDMI 2.0 as well as zpos property support. Along the way there are also a few patches to clean up a few things and fix minor issues. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAlpXlPQTHHRyZWRpbmdA bnZpZGlhLmNvbQAKCRDdI6zXfz6zoUFKD/4vXdkmMUkWjZM0xrdwsPi6DvQe3uBa tE4wchelVnNvLJfBnMVJyEPDiNLoq12pJ6Ol8LRX2f5ExnQUwIEd+RSQPgWSUP6+ bITqSAb9LnEEHMfYLXTHFoBSeqV9nGvpYcouupW5R4cdV4/T7k7x1/6QQg6Byoyx TULTcpCmMFX4FQGrqWHSrPrkw+MDWYiDmekYcrHmrgOtZUfG7DxdWtQpgs2lrstg m+FZADSVJ9CwuVgwAO4VTDIeKVHW54b5UPYseH1u/uaAoxVPC50XNJk3RLuSPVWg 8d6BpkUoqmWq8w5tmR+/zx0/WobyRAQYljdd1kWFnnn3slNOvVV6bnOSo9u3OatZ 1DGyaeQr9hXQ2CdSx2oImex2Kslb14yJPczFa6GQBfrfPOPKJk8eh1GIF6bWGtQa +hzWr1BDDd/q2x6jkIFMQel33Z8dNy1+22GcSYpuofuQeMqD4msccfhnTce1/Mhy h0+fQK2eFWDbtvSj6rao4CtzVDOCi9+b93Hva/kh7Ap2Wn7eUDLmRh/VtnUj7EP7 LYPNYlFC6rWzfTdHV0oYUizXNRx6ZzQFNYXNmRjjfVMzrXeqkpSsZXcYVhd4J3PB EmZpiWNeqqGUnoxvSUX0AmC3/VSi7dU+E8ecIzyeVMry2cgXSal7gewPirDUICOI uiYCJaeWxHJBAA== =FfXI -----END PGP SIGNATURE----- Merge tag 'drm/tegra/for-4.16-rc1-fixes' of git://anongit.freedesktop.org/tegra/linux into drm-next drm/tegra: Changes for v4.16-rc1 The bulk of these changes are preparation work and addition of support for Tegra186. Currently only HDMI output (the primary output on Jetson TX2) is supported, but the hardware is also capable of doing DSI and DisplayPort. Tegra DRM now also uses the atomic commit helpers instead of the open- coded variant that was only doing half its job. As a bit of a byproduct of the Tegra186 support the driver also gained HDMI 2.0 as well as zpos property support. Along the way there are also a few patches to clean up a few things and fix minor issues. * tag 'drm/tegra/for-4.16-rc1-fixes' of git://anongit.freedesktop.org/tegra/linux: (51 commits) drm/tegra: dc: Properly cleanup overlay planes drm/tegra: dc: Fix possible_crtcs mask for planes drm/tegra: dc: Restore YUV overlay support drm/tegra: dc: Implement legacy blending drm/tegra: Correct timeout in tegra_syncpt_wait drm/tegra: gem: Correct iommu_map_sg() error checking drm/tegra: dc: Link DC1 to DC0 on Tegra20 drm/tegra: Fix non-debugfs builds drm/tegra: dpaux: Keep reset defaults for hybrid pad parameters drm/tegra: Mark Tegra186 display hub PM functions __maybe_unused drm/tegra: Use IOMMU groups gpu: host1x: Use IOMMU groups drm/tegra: Implement zpos property drm/tegra: dc: Remove redundant spinlock drm/tegra: dc: Use direct offset to plane registers drm/tegra: dc: Support more formats drm/tegra: fb: Force alpha formats drm/tegra: dpaux: Add Tegra186 support drm/tegra: dpaux: Implement runtime PM drm/tegra: sor: Support HDMI 2.0 modes ...
1371 lines
31 KiB
C
1371 lines
31 KiB
C
/*
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* Copyright (C) 2012 Avionic Design GmbH
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* Copyright (C) 2012-2016 NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/bitops.h>
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#include <linux/host1x.h>
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#include <linux/idr.h>
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#include <linux/iommu.h>
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#include <drm/drm_atomic.h>
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#include <drm/drm_atomic_helper.h>
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#include "drm.h"
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#include "gem.h"
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#define DRIVER_NAME "tegra"
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#define DRIVER_DESC "NVIDIA Tegra graphics"
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#define DRIVER_DATE "20120330"
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#define DRIVER_MAJOR 0
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#define DRIVER_MINOR 0
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#define DRIVER_PATCHLEVEL 0
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#define CARVEOUT_SZ SZ_64M
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#define CDMA_GATHER_FETCHES_MAX_NB 16383
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struct tegra_drm_file {
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struct idr contexts;
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struct mutex lock;
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};
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static int tegra_atomic_check(struct drm_device *drm,
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struct drm_atomic_state *state)
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{
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int err;
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err = drm_atomic_helper_check_modeset(drm, state);
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if (err < 0)
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return err;
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err = drm_atomic_normalize_zpos(drm, state);
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if (err < 0)
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return err;
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err = drm_atomic_helper_check_planes(drm, state);
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if (err < 0)
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return err;
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if (state->legacy_cursor_update)
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state->async_update = !drm_atomic_helper_async_check(drm, state);
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return 0;
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}
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static struct drm_atomic_state *
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tegra_atomic_state_alloc(struct drm_device *drm)
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{
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struct tegra_atomic_state *state = kzalloc(sizeof(*state), GFP_KERNEL);
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if (!state || drm_atomic_state_init(drm, &state->base) < 0) {
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kfree(state);
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return NULL;
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}
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return &state->base;
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}
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static void tegra_atomic_state_clear(struct drm_atomic_state *state)
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{
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struct tegra_atomic_state *tegra = to_tegra_atomic_state(state);
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drm_atomic_state_default_clear(state);
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tegra->clk_disp = NULL;
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tegra->dc = NULL;
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tegra->rate = 0;
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}
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static void tegra_atomic_state_free(struct drm_atomic_state *state)
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{
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drm_atomic_state_default_release(state);
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kfree(state);
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}
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static const struct drm_mode_config_funcs tegra_drm_mode_config_funcs = {
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.fb_create = tegra_fb_create,
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#ifdef CONFIG_DRM_FBDEV_EMULATION
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.output_poll_changed = drm_fb_helper_output_poll_changed,
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#endif
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.atomic_check = tegra_atomic_check,
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.atomic_commit = drm_atomic_helper_commit,
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.atomic_state_alloc = tegra_atomic_state_alloc,
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.atomic_state_clear = tegra_atomic_state_clear,
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.atomic_state_free = tegra_atomic_state_free,
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};
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static void tegra_atomic_commit_tail(struct drm_atomic_state *old_state)
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{
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struct drm_device *drm = old_state->dev;
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struct tegra_drm *tegra = drm->dev_private;
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if (tegra->hub) {
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drm_atomic_helper_commit_modeset_disables(drm, old_state);
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tegra_display_hub_atomic_commit(drm, old_state);
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drm_atomic_helper_commit_planes(drm, old_state, 0);
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drm_atomic_helper_commit_modeset_enables(drm, old_state);
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drm_atomic_helper_commit_hw_done(old_state);
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drm_atomic_helper_wait_for_vblanks(drm, old_state);
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drm_atomic_helper_cleanup_planes(drm, old_state);
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} else {
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drm_atomic_helper_commit_tail_rpm(old_state);
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}
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}
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static const struct drm_mode_config_helper_funcs
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tegra_drm_mode_config_helpers = {
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.atomic_commit_tail = tegra_atomic_commit_tail,
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};
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static int tegra_drm_load(struct drm_device *drm, unsigned long flags)
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{
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struct host1x_device *device = to_host1x_device(drm->dev);
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struct tegra_drm *tegra;
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int err;
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tegra = kzalloc(sizeof(*tegra), GFP_KERNEL);
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if (!tegra)
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return -ENOMEM;
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if (iommu_present(&platform_bus_type)) {
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u64 carveout_start, carveout_end, gem_start, gem_end;
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struct iommu_domain_geometry *geometry;
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unsigned long order;
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tegra->domain = iommu_domain_alloc(&platform_bus_type);
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if (!tegra->domain) {
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err = -ENOMEM;
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goto free;
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}
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geometry = &tegra->domain->geometry;
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gem_start = geometry->aperture_start;
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gem_end = geometry->aperture_end - CARVEOUT_SZ;
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carveout_start = gem_end + 1;
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carveout_end = geometry->aperture_end;
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order = __ffs(tegra->domain->pgsize_bitmap);
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init_iova_domain(&tegra->carveout.domain, 1UL << order,
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carveout_start >> order);
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tegra->carveout.shift = iova_shift(&tegra->carveout.domain);
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tegra->carveout.limit = carveout_end >> tegra->carveout.shift;
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drm_mm_init(&tegra->mm, gem_start, gem_end - gem_start + 1);
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mutex_init(&tegra->mm_lock);
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DRM_DEBUG("IOMMU apertures:\n");
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DRM_DEBUG(" GEM: %#llx-%#llx\n", gem_start, gem_end);
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DRM_DEBUG(" Carveout: %#llx-%#llx\n", carveout_start,
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carveout_end);
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}
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mutex_init(&tegra->clients_lock);
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INIT_LIST_HEAD(&tegra->clients);
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drm->dev_private = tegra;
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tegra->drm = drm;
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drm_mode_config_init(drm);
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drm->mode_config.min_width = 0;
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drm->mode_config.min_height = 0;
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drm->mode_config.max_width = 4096;
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drm->mode_config.max_height = 4096;
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drm->mode_config.allow_fb_modifiers = true;
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drm->mode_config.funcs = &tegra_drm_mode_config_funcs;
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drm->mode_config.helper_private = &tegra_drm_mode_config_helpers;
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err = tegra_drm_fb_prepare(drm);
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if (err < 0)
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goto config;
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drm_kms_helper_poll_init(drm);
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err = host1x_device_init(device);
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if (err < 0)
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goto fbdev;
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if (tegra->hub) {
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err = tegra_display_hub_prepare(tegra->hub);
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if (err < 0)
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goto device;
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}
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/*
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* We don't use the drm_irq_install() helpers provided by the DRM
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* core, so we need to set this manually in order to allow the
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* DRM_IOCTL_WAIT_VBLANK to operate correctly.
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*/
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drm->irq_enabled = true;
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/* syncpoints are used for full 32-bit hardware VBLANK counters */
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drm->max_vblank_count = 0xffffffff;
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err = drm_vblank_init(drm, drm->mode_config.num_crtc);
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if (err < 0)
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goto hub;
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drm_mode_config_reset(drm);
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err = tegra_drm_fb_init(drm);
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if (err < 0)
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goto hub;
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return 0;
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hub:
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if (tegra->hub)
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tegra_display_hub_cleanup(tegra->hub);
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device:
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host1x_device_exit(device);
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fbdev:
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drm_kms_helper_poll_fini(drm);
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tegra_drm_fb_free(drm);
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config:
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drm_mode_config_cleanup(drm);
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if (tegra->domain) {
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iommu_domain_free(tegra->domain);
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drm_mm_takedown(&tegra->mm);
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mutex_destroy(&tegra->mm_lock);
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put_iova_domain(&tegra->carveout.domain);
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}
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free:
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kfree(tegra);
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return err;
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}
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static void tegra_drm_unload(struct drm_device *drm)
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{
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struct host1x_device *device = to_host1x_device(drm->dev);
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struct tegra_drm *tegra = drm->dev_private;
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int err;
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drm_kms_helper_poll_fini(drm);
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tegra_drm_fb_exit(drm);
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drm_mode_config_cleanup(drm);
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err = host1x_device_exit(device);
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if (err < 0)
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return;
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if (tegra->domain) {
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iommu_domain_free(tegra->domain);
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drm_mm_takedown(&tegra->mm);
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mutex_destroy(&tegra->mm_lock);
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put_iova_domain(&tegra->carveout.domain);
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}
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kfree(tegra);
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}
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static int tegra_drm_open(struct drm_device *drm, struct drm_file *filp)
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{
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struct tegra_drm_file *fpriv;
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fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
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if (!fpriv)
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return -ENOMEM;
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idr_init(&fpriv->contexts);
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mutex_init(&fpriv->lock);
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filp->driver_priv = fpriv;
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return 0;
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}
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static void tegra_drm_context_free(struct tegra_drm_context *context)
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{
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context->client->ops->close_channel(context);
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kfree(context);
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}
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static struct host1x_bo *
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host1x_bo_lookup(struct drm_file *file, u32 handle)
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{
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struct drm_gem_object *gem;
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struct tegra_bo *bo;
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gem = drm_gem_object_lookup(file, handle);
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if (!gem)
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return NULL;
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bo = to_tegra_bo(gem);
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return &bo->base;
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}
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static int host1x_reloc_copy_from_user(struct host1x_reloc *dest,
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struct drm_tegra_reloc __user *src,
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struct drm_device *drm,
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struct drm_file *file)
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{
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u32 cmdbuf, target;
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int err;
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err = get_user(cmdbuf, &src->cmdbuf.handle);
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if (err < 0)
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return err;
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err = get_user(dest->cmdbuf.offset, &src->cmdbuf.offset);
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if (err < 0)
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return err;
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err = get_user(target, &src->target.handle);
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if (err < 0)
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return err;
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err = get_user(dest->target.offset, &src->target.offset);
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if (err < 0)
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return err;
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err = get_user(dest->shift, &src->shift);
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if (err < 0)
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return err;
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dest->cmdbuf.bo = host1x_bo_lookup(file, cmdbuf);
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if (!dest->cmdbuf.bo)
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return -ENOENT;
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dest->target.bo = host1x_bo_lookup(file, target);
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if (!dest->target.bo)
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return -ENOENT;
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return 0;
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}
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static int host1x_waitchk_copy_from_user(struct host1x_waitchk *dest,
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struct drm_tegra_waitchk __user *src,
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struct drm_file *file)
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{
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u32 cmdbuf;
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int err;
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err = get_user(cmdbuf, &src->handle);
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if (err < 0)
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return err;
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err = get_user(dest->offset, &src->offset);
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if (err < 0)
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return err;
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err = get_user(dest->syncpt_id, &src->syncpt);
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if (err < 0)
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return err;
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err = get_user(dest->thresh, &src->thresh);
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if (err < 0)
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return err;
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dest->bo = host1x_bo_lookup(file, cmdbuf);
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if (!dest->bo)
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return -ENOENT;
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return 0;
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}
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int tegra_drm_submit(struct tegra_drm_context *context,
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struct drm_tegra_submit *args, struct drm_device *drm,
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struct drm_file *file)
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{
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unsigned int num_cmdbufs = args->num_cmdbufs;
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unsigned int num_relocs = args->num_relocs;
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unsigned int num_waitchks = args->num_waitchks;
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struct drm_tegra_cmdbuf __user *user_cmdbufs;
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struct drm_tegra_reloc __user *user_relocs;
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struct drm_tegra_waitchk __user *user_waitchks;
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struct drm_tegra_syncpt __user *user_syncpt;
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struct drm_tegra_syncpt syncpt;
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struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
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struct drm_gem_object **refs;
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struct host1x_syncpt *sp;
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struct host1x_job *job;
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unsigned int num_refs;
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int err;
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user_cmdbufs = u64_to_user_ptr(args->cmdbufs);
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user_relocs = u64_to_user_ptr(args->relocs);
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user_waitchks = u64_to_user_ptr(args->waitchks);
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user_syncpt = u64_to_user_ptr(args->syncpts);
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/* We don't yet support other than one syncpt_incr struct per submit */
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if (args->num_syncpts != 1)
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return -EINVAL;
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/* We don't yet support waitchks */
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if (args->num_waitchks != 0)
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return -EINVAL;
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job = host1x_job_alloc(context->channel, args->num_cmdbufs,
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args->num_relocs, args->num_waitchks);
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if (!job)
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return -ENOMEM;
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job->num_relocs = args->num_relocs;
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job->num_waitchk = args->num_waitchks;
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job->client = (u32)args->context;
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job->class = context->client->base.class;
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job->serialize = true;
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/*
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* Track referenced BOs so that they can be unreferenced after the
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* submission is complete.
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*/
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num_refs = num_cmdbufs + num_relocs * 2 + num_waitchks;
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refs = kmalloc_array(num_refs, sizeof(*refs), GFP_KERNEL);
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if (!refs) {
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err = -ENOMEM;
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goto put;
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}
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/* reuse as an iterator later */
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num_refs = 0;
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while (num_cmdbufs) {
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struct drm_tegra_cmdbuf cmdbuf;
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struct host1x_bo *bo;
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struct tegra_bo *obj;
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u64 offset;
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if (copy_from_user(&cmdbuf, user_cmdbufs, sizeof(cmdbuf))) {
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err = -EFAULT;
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goto fail;
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}
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/*
|
|
* The maximum number of CDMA gather fetches is 16383, a higher
|
|
* value means the words count is malformed.
|
|
*/
|
|
if (cmdbuf.words > CDMA_GATHER_FETCHES_MAX_NB) {
|
|
err = -EINVAL;
|
|
goto fail;
|
|
}
|
|
|
|
bo = host1x_bo_lookup(file, cmdbuf.handle);
|
|
if (!bo) {
|
|
err = -ENOENT;
|
|
goto fail;
|
|
}
|
|
|
|
offset = (u64)cmdbuf.offset + (u64)cmdbuf.words * sizeof(u32);
|
|
obj = host1x_to_tegra_bo(bo);
|
|
refs[num_refs++] = &obj->gem;
|
|
|
|
/*
|
|
* Gather buffer base address must be 4-bytes aligned,
|
|
* unaligned offset is malformed and cause commands stream
|
|
* corruption on the buffer address relocation.
|
|
*/
|
|
if (offset & 3 || offset >= obj->gem.size) {
|
|
err = -EINVAL;
|
|
goto fail;
|
|
}
|
|
|
|
host1x_job_add_gather(job, bo, cmdbuf.words, cmdbuf.offset);
|
|
num_cmdbufs--;
|
|
user_cmdbufs++;
|
|
}
|
|
|
|
/* copy and resolve relocations from submit */
|
|
while (num_relocs--) {
|
|
struct host1x_reloc *reloc;
|
|
struct tegra_bo *obj;
|
|
|
|
err = host1x_reloc_copy_from_user(&job->relocarray[num_relocs],
|
|
&user_relocs[num_relocs], drm,
|
|
file);
|
|
if (err < 0)
|
|
goto fail;
|
|
|
|
reloc = &job->relocarray[num_relocs];
|
|
obj = host1x_to_tegra_bo(reloc->cmdbuf.bo);
|
|
refs[num_refs++] = &obj->gem;
|
|
|
|
/*
|
|
* The unaligned cmdbuf offset will cause an unaligned write
|
|
* during of the relocations patching, corrupting the commands
|
|
* stream.
|
|
*/
|
|
if (reloc->cmdbuf.offset & 3 ||
|
|
reloc->cmdbuf.offset >= obj->gem.size) {
|
|
err = -EINVAL;
|
|
goto fail;
|
|
}
|
|
|
|
obj = host1x_to_tegra_bo(reloc->target.bo);
|
|
refs[num_refs++] = &obj->gem;
|
|
|
|
if (reloc->target.offset >= obj->gem.size) {
|
|
err = -EINVAL;
|
|
goto fail;
|
|
}
|
|
}
|
|
|
|
/* copy and resolve waitchks from submit */
|
|
while (num_waitchks--) {
|
|
struct host1x_waitchk *wait = &job->waitchk[num_waitchks];
|
|
struct tegra_bo *obj;
|
|
|
|
err = host1x_waitchk_copy_from_user(
|
|
wait, &user_waitchks[num_waitchks], file);
|
|
if (err < 0)
|
|
goto fail;
|
|
|
|
obj = host1x_to_tegra_bo(wait->bo);
|
|
refs[num_refs++] = &obj->gem;
|
|
|
|
/*
|
|
* The unaligned offset will cause an unaligned write during
|
|
* of the waitchks patching, corrupting the commands stream.
|
|
*/
|
|
if (wait->offset & 3 ||
|
|
wait->offset >= obj->gem.size) {
|
|
err = -EINVAL;
|
|
goto fail;
|
|
}
|
|
}
|
|
|
|
if (copy_from_user(&syncpt, user_syncpt, sizeof(syncpt))) {
|
|
err = -EFAULT;
|
|
goto fail;
|
|
}
|
|
|
|
/* check whether syncpoint ID is valid */
|
|
sp = host1x_syncpt_get(host1x, syncpt.id);
|
|
if (!sp) {
|
|
err = -ENOENT;
|
|
goto fail;
|
|
}
|
|
|
|
job->is_addr_reg = context->client->ops->is_addr_reg;
|
|
job->is_valid_class = context->client->ops->is_valid_class;
|
|
job->syncpt_incrs = syncpt.incrs;
|
|
job->syncpt_id = syncpt.id;
|
|
job->timeout = 10000;
|
|
|
|
if (args->timeout && args->timeout < 10000)
|
|
job->timeout = args->timeout;
|
|
|
|
err = host1x_job_pin(job, context->client->base.dev);
|
|
if (err)
|
|
goto fail;
|
|
|
|
err = host1x_job_submit(job);
|
|
if (err) {
|
|
host1x_job_unpin(job);
|
|
goto fail;
|
|
}
|
|
|
|
args->fence = job->syncpt_end;
|
|
|
|
fail:
|
|
while (num_refs--)
|
|
drm_gem_object_put_unlocked(refs[num_refs]);
|
|
|
|
kfree(refs);
|
|
|
|
put:
|
|
host1x_job_put(job);
|
|
return err;
|
|
}
|
|
|
|
|
|
#ifdef CONFIG_DRM_TEGRA_STAGING
|
|
static int tegra_gem_create(struct drm_device *drm, void *data,
|
|
struct drm_file *file)
|
|
{
|
|
struct drm_tegra_gem_create *args = data;
|
|
struct tegra_bo *bo;
|
|
|
|
bo = tegra_bo_create_with_handle(file, drm, args->size, args->flags,
|
|
&args->handle);
|
|
if (IS_ERR(bo))
|
|
return PTR_ERR(bo);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int tegra_gem_mmap(struct drm_device *drm, void *data,
|
|
struct drm_file *file)
|
|
{
|
|
struct drm_tegra_gem_mmap *args = data;
|
|
struct drm_gem_object *gem;
|
|
struct tegra_bo *bo;
|
|
|
|
gem = drm_gem_object_lookup(file, args->handle);
|
|
if (!gem)
|
|
return -EINVAL;
|
|
|
|
bo = to_tegra_bo(gem);
|
|
|
|
args->offset = drm_vma_node_offset_addr(&bo->gem.vma_node);
|
|
|
|
drm_gem_object_put_unlocked(gem);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int tegra_syncpt_read(struct drm_device *drm, void *data,
|
|
struct drm_file *file)
|
|
{
|
|
struct host1x *host = dev_get_drvdata(drm->dev->parent);
|
|
struct drm_tegra_syncpt_read *args = data;
|
|
struct host1x_syncpt *sp;
|
|
|
|
sp = host1x_syncpt_get(host, args->id);
|
|
if (!sp)
|
|
return -EINVAL;
|
|
|
|
args->value = host1x_syncpt_read_min(sp);
|
|
return 0;
|
|
}
|
|
|
|
static int tegra_syncpt_incr(struct drm_device *drm, void *data,
|
|
struct drm_file *file)
|
|
{
|
|
struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
|
|
struct drm_tegra_syncpt_incr *args = data;
|
|
struct host1x_syncpt *sp;
|
|
|
|
sp = host1x_syncpt_get(host1x, args->id);
|
|
if (!sp)
|
|
return -EINVAL;
|
|
|
|
return host1x_syncpt_incr(sp);
|
|
}
|
|
|
|
static int tegra_syncpt_wait(struct drm_device *drm, void *data,
|
|
struct drm_file *file)
|
|
{
|
|
struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
|
|
struct drm_tegra_syncpt_wait *args = data;
|
|
struct host1x_syncpt *sp;
|
|
|
|
sp = host1x_syncpt_get(host1x, args->id);
|
|
if (!sp)
|
|
return -EINVAL;
|
|
|
|
return host1x_syncpt_wait(sp, args->thresh,
|
|
msecs_to_jiffies(args->timeout),
|
|
&args->value);
|
|
}
|
|
|
|
static int tegra_client_open(struct tegra_drm_file *fpriv,
|
|
struct tegra_drm_client *client,
|
|
struct tegra_drm_context *context)
|
|
{
|
|
int err;
|
|
|
|
err = client->ops->open_channel(client, context);
|
|
if (err < 0)
|
|
return err;
|
|
|
|
err = idr_alloc(&fpriv->contexts, context, 1, 0, GFP_KERNEL);
|
|
if (err < 0) {
|
|
client->ops->close_channel(context);
|
|
return err;
|
|
}
|
|
|
|
context->client = client;
|
|
context->id = err;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int tegra_open_channel(struct drm_device *drm, void *data,
|
|
struct drm_file *file)
|
|
{
|
|
struct tegra_drm_file *fpriv = file->driver_priv;
|
|
struct tegra_drm *tegra = drm->dev_private;
|
|
struct drm_tegra_open_channel *args = data;
|
|
struct tegra_drm_context *context;
|
|
struct tegra_drm_client *client;
|
|
int err = -ENODEV;
|
|
|
|
context = kzalloc(sizeof(*context), GFP_KERNEL);
|
|
if (!context)
|
|
return -ENOMEM;
|
|
|
|
mutex_lock(&fpriv->lock);
|
|
|
|
list_for_each_entry(client, &tegra->clients, list)
|
|
if (client->base.class == args->client) {
|
|
err = tegra_client_open(fpriv, client, context);
|
|
if (err < 0)
|
|
break;
|
|
|
|
args->context = context->id;
|
|
break;
|
|
}
|
|
|
|
if (err < 0)
|
|
kfree(context);
|
|
|
|
mutex_unlock(&fpriv->lock);
|
|
return err;
|
|
}
|
|
|
|
static int tegra_close_channel(struct drm_device *drm, void *data,
|
|
struct drm_file *file)
|
|
{
|
|
struct tegra_drm_file *fpriv = file->driver_priv;
|
|
struct drm_tegra_close_channel *args = data;
|
|
struct tegra_drm_context *context;
|
|
int err = 0;
|
|
|
|
mutex_lock(&fpriv->lock);
|
|
|
|
context = idr_find(&fpriv->contexts, args->context);
|
|
if (!context) {
|
|
err = -EINVAL;
|
|
goto unlock;
|
|
}
|
|
|
|
idr_remove(&fpriv->contexts, context->id);
|
|
tegra_drm_context_free(context);
|
|
|
|
unlock:
|
|
mutex_unlock(&fpriv->lock);
|
|
return err;
|
|
}
|
|
|
|
static int tegra_get_syncpt(struct drm_device *drm, void *data,
|
|
struct drm_file *file)
|
|
{
|
|
struct tegra_drm_file *fpriv = file->driver_priv;
|
|
struct drm_tegra_get_syncpt *args = data;
|
|
struct tegra_drm_context *context;
|
|
struct host1x_syncpt *syncpt;
|
|
int err = 0;
|
|
|
|
mutex_lock(&fpriv->lock);
|
|
|
|
context = idr_find(&fpriv->contexts, args->context);
|
|
if (!context) {
|
|
err = -ENODEV;
|
|
goto unlock;
|
|
}
|
|
|
|
if (args->index >= context->client->base.num_syncpts) {
|
|
err = -EINVAL;
|
|
goto unlock;
|
|
}
|
|
|
|
syncpt = context->client->base.syncpts[args->index];
|
|
args->id = host1x_syncpt_id(syncpt);
|
|
|
|
unlock:
|
|
mutex_unlock(&fpriv->lock);
|
|
return err;
|
|
}
|
|
|
|
static int tegra_submit(struct drm_device *drm, void *data,
|
|
struct drm_file *file)
|
|
{
|
|
struct tegra_drm_file *fpriv = file->driver_priv;
|
|
struct drm_tegra_submit *args = data;
|
|
struct tegra_drm_context *context;
|
|
int err;
|
|
|
|
mutex_lock(&fpriv->lock);
|
|
|
|
context = idr_find(&fpriv->contexts, args->context);
|
|
if (!context) {
|
|
err = -ENODEV;
|
|
goto unlock;
|
|
}
|
|
|
|
err = context->client->ops->submit(context, args, drm, file);
|
|
|
|
unlock:
|
|
mutex_unlock(&fpriv->lock);
|
|
return err;
|
|
}
|
|
|
|
static int tegra_get_syncpt_base(struct drm_device *drm, void *data,
|
|
struct drm_file *file)
|
|
{
|
|
struct tegra_drm_file *fpriv = file->driver_priv;
|
|
struct drm_tegra_get_syncpt_base *args = data;
|
|
struct tegra_drm_context *context;
|
|
struct host1x_syncpt_base *base;
|
|
struct host1x_syncpt *syncpt;
|
|
int err = 0;
|
|
|
|
mutex_lock(&fpriv->lock);
|
|
|
|
context = idr_find(&fpriv->contexts, args->context);
|
|
if (!context) {
|
|
err = -ENODEV;
|
|
goto unlock;
|
|
}
|
|
|
|
if (args->syncpt >= context->client->base.num_syncpts) {
|
|
err = -EINVAL;
|
|
goto unlock;
|
|
}
|
|
|
|
syncpt = context->client->base.syncpts[args->syncpt];
|
|
|
|
base = host1x_syncpt_get_base(syncpt);
|
|
if (!base) {
|
|
err = -ENXIO;
|
|
goto unlock;
|
|
}
|
|
|
|
args->id = host1x_syncpt_base_id(base);
|
|
|
|
unlock:
|
|
mutex_unlock(&fpriv->lock);
|
|
return err;
|
|
}
|
|
|
|
static int tegra_gem_set_tiling(struct drm_device *drm, void *data,
|
|
struct drm_file *file)
|
|
{
|
|
struct drm_tegra_gem_set_tiling *args = data;
|
|
enum tegra_bo_tiling_mode mode;
|
|
struct drm_gem_object *gem;
|
|
unsigned long value = 0;
|
|
struct tegra_bo *bo;
|
|
|
|
switch (args->mode) {
|
|
case DRM_TEGRA_GEM_TILING_MODE_PITCH:
|
|
mode = TEGRA_BO_TILING_MODE_PITCH;
|
|
|
|
if (args->value != 0)
|
|
return -EINVAL;
|
|
|
|
break;
|
|
|
|
case DRM_TEGRA_GEM_TILING_MODE_TILED:
|
|
mode = TEGRA_BO_TILING_MODE_TILED;
|
|
|
|
if (args->value != 0)
|
|
return -EINVAL;
|
|
|
|
break;
|
|
|
|
case DRM_TEGRA_GEM_TILING_MODE_BLOCK:
|
|
mode = TEGRA_BO_TILING_MODE_BLOCK;
|
|
|
|
if (args->value > 5)
|
|
return -EINVAL;
|
|
|
|
value = args->value;
|
|
break;
|
|
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
gem = drm_gem_object_lookup(file, args->handle);
|
|
if (!gem)
|
|
return -ENOENT;
|
|
|
|
bo = to_tegra_bo(gem);
|
|
|
|
bo->tiling.mode = mode;
|
|
bo->tiling.value = value;
|
|
|
|
drm_gem_object_put_unlocked(gem);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int tegra_gem_get_tiling(struct drm_device *drm, void *data,
|
|
struct drm_file *file)
|
|
{
|
|
struct drm_tegra_gem_get_tiling *args = data;
|
|
struct drm_gem_object *gem;
|
|
struct tegra_bo *bo;
|
|
int err = 0;
|
|
|
|
gem = drm_gem_object_lookup(file, args->handle);
|
|
if (!gem)
|
|
return -ENOENT;
|
|
|
|
bo = to_tegra_bo(gem);
|
|
|
|
switch (bo->tiling.mode) {
|
|
case TEGRA_BO_TILING_MODE_PITCH:
|
|
args->mode = DRM_TEGRA_GEM_TILING_MODE_PITCH;
|
|
args->value = 0;
|
|
break;
|
|
|
|
case TEGRA_BO_TILING_MODE_TILED:
|
|
args->mode = DRM_TEGRA_GEM_TILING_MODE_TILED;
|
|
args->value = 0;
|
|
break;
|
|
|
|
case TEGRA_BO_TILING_MODE_BLOCK:
|
|
args->mode = DRM_TEGRA_GEM_TILING_MODE_BLOCK;
|
|
args->value = bo->tiling.value;
|
|
break;
|
|
|
|
default:
|
|
err = -EINVAL;
|
|
break;
|
|
}
|
|
|
|
drm_gem_object_put_unlocked(gem);
|
|
|
|
return err;
|
|
}
|
|
|
|
static int tegra_gem_set_flags(struct drm_device *drm, void *data,
|
|
struct drm_file *file)
|
|
{
|
|
struct drm_tegra_gem_set_flags *args = data;
|
|
struct drm_gem_object *gem;
|
|
struct tegra_bo *bo;
|
|
|
|
if (args->flags & ~DRM_TEGRA_GEM_FLAGS)
|
|
return -EINVAL;
|
|
|
|
gem = drm_gem_object_lookup(file, args->handle);
|
|
if (!gem)
|
|
return -ENOENT;
|
|
|
|
bo = to_tegra_bo(gem);
|
|
bo->flags = 0;
|
|
|
|
if (args->flags & DRM_TEGRA_GEM_BOTTOM_UP)
|
|
bo->flags |= TEGRA_BO_BOTTOM_UP;
|
|
|
|
drm_gem_object_put_unlocked(gem);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int tegra_gem_get_flags(struct drm_device *drm, void *data,
|
|
struct drm_file *file)
|
|
{
|
|
struct drm_tegra_gem_get_flags *args = data;
|
|
struct drm_gem_object *gem;
|
|
struct tegra_bo *bo;
|
|
|
|
gem = drm_gem_object_lookup(file, args->handle);
|
|
if (!gem)
|
|
return -ENOENT;
|
|
|
|
bo = to_tegra_bo(gem);
|
|
args->flags = 0;
|
|
|
|
if (bo->flags & TEGRA_BO_BOTTOM_UP)
|
|
args->flags |= DRM_TEGRA_GEM_BOTTOM_UP;
|
|
|
|
drm_gem_object_put_unlocked(gem);
|
|
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
static const struct drm_ioctl_desc tegra_drm_ioctls[] = {
|
|
#ifdef CONFIG_DRM_TEGRA_STAGING
|
|
DRM_IOCTL_DEF_DRV(TEGRA_GEM_CREATE, tegra_gem_create,
|
|
DRM_UNLOCKED | DRM_RENDER_ALLOW),
|
|
DRM_IOCTL_DEF_DRV(TEGRA_GEM_MMAP, tegra_gem_mmap,
|
|
DRM_UNLOCKED | DRM_RENDER_ALLOW),
|
|
DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_READ, tegra_syncpt_read,
|
|
DRM_UNLOCKED | DRM_RENDER_ALLOW),
|
|
DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_INCR, tegra_syncpt_incr,
|
|
DRM_UNLOCKED | DRM_RENDER_ALLOW),
|
|
DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_WAIT, tegra_syncpt_wait,
|
|
DRM_UNLOCKED | DRM_RENDER_ALLOW),
|
|
DRM_IOCTL_DEF_DRV(TEGRA_OPEN_CHANNEL, tegra_open_channel,
|
|
DRM_UNLOCKED | DRM_RENDER_ALLOW),
|
|
DRM_IOCTL_DEF_DRV(TEGRA_CLOSE_CHANNEL, tegra_close_channel,
|
|
DRM_UNLOCKED | DRM_RENDER_ALLOW),
|
|
DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT, tegra_get_syncpt,
|
|
DRM_UNLOCKED | DRM_RENDER_ALLOW),
|
|
DRM_IOCTL_DEF_DRV(TEGRA_SUBMIT, tegra_submit,
|
|
DRM_UNLOCKED | DRM_RENDER_ALLOW),
|
|
DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT_BASE, tegra_get_syncpt_base,
|
|
DRM_UNLOCKED | DRM_RENDER_ALLOW),
|
|
DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_TILING, tegra_gem_set_tiling,
|
|
DRM_UNLOCKED | DRM_RENDER_ALLOW),
|
|
DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_TILING, tegra_gem_get_tiling,
|
|
DRM_UNLOCKED | DRM_RENDER_ALLOW),
|
|
DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_FLAGS, tegra_gem_set_flags,
|
|
DRM_UNLOCKED | DRM_RENDER_ALLOW),
|
|
DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_FLAGS, tegra_gem_get_flags,
|
|
DRM_UNLOCKED | DRM_RENDER_ALLOW),
|
|
#endif
|
|
};
|
|
|
|
static const struct file_operations tegra_drm_fops = {
|
|
.owner = THIS_MODULE,
|
|
.open = drm_open,
|
|
.release = drm_release,
|
|
.unlocked_ioctl = drm_ioctl,
|
|
.mmap = tegra_drm_mmap,
|
|
.poll = drm_poll,
|
|
.read = drm_read,
|
|
.compat_ioctl = drm_compat_ioctl,
|
|
.llseek = noop_llseek,
|
|
};
|
|
|
|
static int tegra_drm_context_cleanup(int id, void *p, void *data)
|
|
{
|
|
struct tegra_drm_context *context = p;
|
|
|
|
tegra_drm_context_free(context);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void tegra_drm_postclose(struct drm_device *drm, struct drm_file *file)
|
|
{
|
|
struct tegra_drm_file *fpriv = file->driver_priv;
|
|
|
|
mutex_lock(&fpriv->lock);
|
|
idr_for_each(&fpriv->contexts, tegra_drm_context_cleanup, NULL);
|
|
mutex_unlock(&fpriv->lock);
|
|
|
|
idr_destroy(&fpriv->contexts);
|
|
mutex_destroy(&fpriv->lock);
|
|
kfree(fpriv);
|
|
}
|
|
|
|
#ifdef CONFIG_DEBUG_FS
|
|
static int tegra_debugfs_framebuffers(struct seq_file *s, void *data)
|
|
{
|
|
struct drm_info_node *node = (struct drm_info_node *)s->private;
|
|
struct drm_device *drm = node->minor->dev;
|
|
struct drm_framebuffer *fb;
|
|
|
|
mutex_lock(&drm->mode_config.fb_lock);
|
|
|
|
list_for_each_entry(fb, &drm->mode_config.fb_list, head) {
|
|
seq_printf(s, "%3d: user size: %d x %d, depth %d, %d bpp, refcount %d\n",
|
|
fb->base.id, fb->width, fb->height,
|
|
fb->format->depth,
|
|
fb->format->cpp[0] * 8,
|
|
drm_framebuffer_read_refcount(fb));
|
|
}
|
|
|
|
mutex_unlock(&drm->mode_config.fb_lock);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int tegra_debugfs_iova(struct seq_file *s, void *data)
|
|
{
|
|
struct drm_info_node *node = (struct drm_info_node *)s->private;
|
|
struct drm_device *drm = node->minor->dev;
|
|
struct tegra_drm *tegra = drm->dev_private;
|
|
struct drm_printer p = drm_seq_file_printer(s);
|
|
|
|
if (tegra->domain) {
|
|
mutex_lock(&tegra->mm_lock);
|
|
drm_mm_print(&tegra->mm, &p);
|
|
mutex_unlock(&tegra->mm_lock);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct drm_info_list tegra_debugfs_list[] = {
|
|
{ "framebuffers", tegra_debugfs_framebuffers, 0 },
|
|
{ "iova", tegra_debugfs_iova, 0 },
|
|
};
|
|
|
|
static int tegra_debugfs_init(struct drm_minor *minor)
|
|
{
|
|
return drm_debugfs_create_files(tegra_debugfs_list,
|
|
ARRAY_SIZE(tegra_debugfs_list),
|
|
minor->debugfs_root, minor);
|
|
}
|
|
#endif
|
|
|
|
static struct drm_driver tegra_drm_driver = {
|
|
.driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME |
|
|
DRIVER_ATOMIC | DRIVER_RENDER,
|
|
.load = tegra_drm_load,
|
|
.unload = tegra_drm_unload,
|
|
.open = tegra_drm_open,
|
|
.postclose = tegra_drm_postclose,
|
|
.lastclose = drm_fb_helper_lastclose,
|
|
|
|
#if defined(CONFIG_DEBUG_FS)
|
|
.debugfs_init = tegra_debugfs_init,
|
|
#endif
|
|
|
|
.gem_free_object_unlocked = tegra_bo_free_object,
|
|
.gem_vm_ops = &tegra_bo_vm_ops,
|
|
|
|
.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
|
|
.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
|
|
.gem_prime_export = tegra_gem_prime_export,
|
|
.gem_prime_import = tegra_gem_prime_import,
|
|
|
|
.dumb_create = tegra_bo_dumb_create,
|
|
|
|
.ioctls = tegra_drm_ioctls,
|
|
.num_ioctls = ARRAY_SIZE(tegra_drm_ioctls),
|
|
.fops = &tegra_drm_fops,
|
|
|
|
.name = DRIVER_NAME,
|
|
.desc = DRIVER_DESC,
|
|
.date = DRIVER_DATE,
|
|
.major = DRIVER_MAJOR,
|
|
.minor = DRIVER_MINOR,
|
|
.patchlevel = DRIVER_PATCHLEVEL,
|
|
};
|
|
|
|
int tegra_drm_register_client(struct tegra_drm *tegra,
|
|
struct tegra_drm_client *client)
|
|
{
|
|
mutex_lock(&tegra->clients_lock);
|
|
list_add_tail(&client->list, &tegra->clients);
|
|
mutex_unlock(&tegra->clients_lock);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int tegra_drm_unregister_client(struct tegra_drm *tegra,
|
|
struct tegra_drm_client *client)
|
|
{
|
|
mutex_lock(&tegra->clients_lock);
|
|
list_del_init(&client->list);
|
|
mutex_unlock(&tegra->clients_lock);
|
|
|
|
return 0;
|
|
}
|
|
|
|
void *tegra_drm_alloc(struct tegra_drm *tegra, size_t size, dma_addr_t *dma)
|
|
{
|
|
struct iova *alloc;
|
|
void *virt;
|
|
gfp_t gfp;
|
|
int err;
|
|
|
|
if (tegra->domain)
|
|
size = iova_align(&tegra->carveout.domain, size);
|
|
else
|
|
size = PAGE_ALIGN(size);
|
|
|
|
gfp = GFP_KERNEL | __GFP_ZERO;
|
|
if (!tegra->domain) {
|
|
/*
|
|
* Many units only support 32-bit addresses, even on 64-bit
|
|
* SoCs. If there is no IOMMU to translate into a 32-bit IO
|
|
* virtual address space, force allocations to be in the
|
|
* lower 32-bit range.
|
|
*/
|
|
gfp |= GFP_DMA;
|
|
}
|
|
|
|
virt = (void *)__get_free_pages(gfp, get_order(size));
|
|
if (!virt)
|
|
return ERR_PTR(-ENOMEM);
|
|
|
|
if (!tegra->domain) {
|
|
/*
|
|
* If IOMMU is disabled, devices address physical memory
|
|
* directly.
|
|
*/
|
|
*dma = virt_to_phys(virt);
|
|
return virt;
|
|
}
|
|
|
|
alloc = alloc_iova(&tegra->carveout.domain,
|
|
size >> tegra->carveout.shift,
|
|
tegra->carveout.limit, true);
|
|
if (!alloc) {
|
|
err = -EBUSY;
|
|
goto free_pages;
|
|
}
|
|
|
|
*dma = iova_dma_addr(&tegra->carveout.domain, alloc);
|
|
err = iommu_map(tegra->domain, *dma, virt_to_phys(virt),
|
|
size, IOMMU_READ | IOMMU_WRITE);
|
|
if (err < 0)
|
|
goto free_iova;
|
|
|
|
return virt;
|
|
|
|
free_iova:
|
|
__free_iova(&tegra->carveout.domain, alloc);
|
|
free_pages:
|
|
free_pages((unsigned long)virt, get_order(size));
|
|
|
|
return ERR_PTR(err);
|
|
}
|
|
|
|
void tegra_drm_free(struct tegra_drm *tegra, size_t size, void *virt,
|
|
dma_addr_t dma)
|
|
{
|
|
if (tegra->domain)
|
|
size = iova_align(&tegra->carveout.domain, size);
|
|
else
|
|
size = PAGE_ALIGN(size);
|
|
|
|
if (tegra->domain) {
|
|
iommu_unmap(tegra->domain, dma, size);
|
|
free_iova(&tegra->carveout.domain,
|
|
iova_pfn(&tegra->carveout.domain, dma));
|
|
}
|
|
|
|
free_pages((unsigned long)virt, get_order(size));
|
|
}
|
|
|
|
static int host1x_drm_probe(struct host1x_device *dev)
|
|
{
|
|
struct drm_driver *driver = &tegra_drm_driver;
|
|
struct drm_device *drm;
|
|
int err;
|
|
|
|
drm = drm_dev_alloc(driver, &dev->dev);
|
|
if (IS_ERR(drm))
|
|
return PTR_ERR(drm);
|
|
|
|
dev_set_drvdata(&dev->dev, drm);
|
|
|
|
err = drm_dev_register(drm, 0);
|
|
if (err < 0)
|
|
goto unref;
|
|
|
|
return 0;
|
|
|
|
unref:
|
|
drm_dev_unref(drm);
|
|
return err;
|
|
}
|
|
|
|
static int host1x_drm_remove(struct host1x_device *dev)
|
|
{
|
|
struct drm_device *drm = dev_get_drvdata(&dev->dev);
|
|
|
|
drm_dev_unregister(drm);
|
|
drm_dev_unref(drm);
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
static int host1x_drm_suspend(struct device *dev)
|
|
{
|
|
struct drm_device *drm = dev_get_drvdata(dev);
|
|
struct tegra_drm *tegra = drm->dev_private;
|
|
|
|
drm_kms_helper_poll_disable(drm);
|
|
tegra_drm_fb_suspend(drm);
|
|
|
|
tegra->state = drm_atomic_helper_suspend(drm);
|
|
if (IS_ERR(tegra->state)) {
|
|
tegra_drm_fb_resume(drm);
|
|
drm_kms_helper_poll_enable(drm);
|
|
return PTR_ERR(tegra->state);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int host1x_drm_resume(struct device *dev)
|
|
{
|
|
struct drm_device *drm = dev_get_drvdata(dev);
|
|
struct tegra_drm *tegra = drm->dev_private;
|
|
|
|
drm_atomic_helper_resume(drm, tegra->state);
|
|
tegra_drm_fb_resume(drm);
|
|
drm_kms_helper_poll_enable(drm);
|
|
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
static SIMPLE_DEV_PM_OPS(host1x_drm_pm_ops, host1x_drm_suspend,
|
|
host1x_drm_resume);
|
|
|
|
static const struct of_device_id host1x_drm_subdevs[] = {
|
|
{ .compatible = "nvidia,tegra20-dc", },
|
|
{ .compatible = "nvidia,tegra20-hdmi", },
|
|
{ .compatible = "nvidia,tegra20-gr2d", },
|
|
{ .compatible = "nvidia,tegra20-gr3d", },
|
|
{ .compatible = "nvidia,tegra30-dc", },
|
|
{ .compatible = "nvidia,tegra30-hdmi", },
|
|
{ .compatible = "nvidia,tegra30-gr2d", },
|
|
{ .compatible = "nvidia,tegra30-gr3d", },
|
|
{ .compatible = "nvidia,tegra114-dsi", },
|
|
{ .compatible = "nvidia,tegra114-hdmi", },
|
|
{ .compatible = "nvidia,tegra114-gr3d", },
|
|
{ .compatible = "nvidia,tegra124-dc", },
|
|
{ .compatible = "nvidia,tegra124-sor", },
|
|
{ .compatible = "nvidia,tegra124-hdmi", },
|
|
{ .compatible = "nvidia,tegra124-dsi", },
|
|
{ .compatible = "nvidia,tegra124-vic", },
|
|
{ .compatible = "nvidia,tegra132-dsi", },
|
|
{ .compatible = "nvidia,tegra210-dc", },
|
|
{ .compatible = "nvidia,tegra210-dsi", },
|
|
{ .compatible = "nvidia,tegra210-sor", },
|
|
{ .compatible = "nvidia,tegra210-sor1", },
|
|
{ .compatible = "nvidia,tegra210-vic", },
|
|
{ .compatible = "nvidia,tegra186-display", },
|
|
{ .compatible = "nvidia,tegra186-dc", },
|
|
{ .compatible = "nvidia,tegra186-sor", },
|
|
{ .compatible = "nvidia,tegra186-sor1", },
|
|
{ .compatible = "nvidia,tegra186-vic", },
|
|
{ /* sentinel */ }
|
|
};
|
|
|
|
static struct host1x_driver host1x_drm_driver = {
|
|
.driver = {
|
|
.name = "drm",
|
|
.pm = &host1x_drm_pm_ops,
|
|
},
|
|
.probe = host1x_drm_probe,
|
|
.remove = host1x_drm_remove,
|
|
.subdevs = host1x_drm_subdevs,
|
|
};
|
|
|
|
static struct platform_driver * const drivers[] = {
|
|
&tegra_display_hub_driver,
|
|
&tegra_dc_driver,
|
|
&tegra_hdmi_driver,
|
|
&tegra_dsi_driver,
|
|
&tegra_dpaux_driver,
|
|
&tegra_sor_driver,
|
|
&tegra_gr2d_driver,
|
|
&tegra_gr3d_driver,
|
|
&tegra_vic_driver,
|
|
};
|
|
|
|
static int __init host1x_drm_init(void)
|
|
{
|
|
int err;
|
|
|
|
err = host1x_driver_register(&host1x_drm_driver);
|
|
if (err < 0)
|
|
return err;
|
|
|
|
err = platform_register_drivers(drivers, ARRAY_SIZE(drivers));
|
|
if (err < 0)
|
|
goto unregister_host1x;
|
|
|
|
return 0;
|
|
|
|
unregister_host1x:
|
|
host1x_driver_unregister(&host1x_drm_driver);
|
|
return err;
|
|
}
|
|
module_init(host1x_drm_init);
|
|
|
|
static void __exit host1x_drm_exit(void)
|
|
{
|
|
platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
|
|
host1x_driver_unregister(&host1x_drm_driver);
|
|
}
|
|
module_exit(host1x_drm_exit);
|
|
|
|
MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");
|
|
MODULE_DESCRIPTION("NVIDIA Tegra DRM driver");
|
|
MODULE_LICENSE("GPL v2");
|