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00a9730e10
This patch adds cache and tlb sync codes for abiv1 & abiv2. Signed-off-by: Guo Ren <ren_guo@c-sky.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
49 lines
1.5 KiB
C
49 lines
1.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
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#ifndef __ABI_CSKY_CACHEFLUSH_H
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#define __ABI_CSKY_CACHEFLUSH_H
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#include <linux/compiler.h>
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#include <asm/string.h>
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#include <asm/cache.h>
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#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
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extern void flush_dcache_page(struct page *);
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#define flush_cache_mm(mm) cache_wbinv_all()
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#define flush_cache_page(vma, page, pfn) cache_wbinv_all()
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#define flush_cache_dup_mm(mm) cache_wbinv_all()
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/*
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* if (current_mm != vma->mm) cache_wbinv_range(start, end) will be broken.
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* Use cache_wbinv_all() here and need to be improved in future.
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*/
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#define flush_cache_range(vma, start, end) cache_wbinv_all()
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#define flush_cache_vmap(start, end) cache_wbinv_range(start, end)
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#define flush_cache_vunmap(start, end) cache_wbinv_range(start, end)
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#define flush_icache_page(vma, page) cache_wbinv_all()
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#define flush_icache_range(start, end) cache_wbinv_range(start, end)
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#define flush_icache_user_range(vma, pg, adr, len) \
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cache_wbinv_range(adr, adr + len)
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#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
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do { \
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cache_wbinv_all(); \
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memcpy(dst, src, len); \
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cache_wbinv_all(); \
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} while (0)
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#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
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do { \
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cache_wbinv_all(); \
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memcpy(dst, src, len); \
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cache_wbinv_all(); \
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} while (0)
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#define flush_dcache_mmap_lock(mapping) do {} while (0)
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#define flush_dcache_mmap_unlock(mapping) do {} while (0)
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#endif /* __ABI_CSKY_CACHEFLUSH_H */
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