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735ee005c3
This patch adds csky registers' definition, bitops, byteorder, asm-offsets codes. Signed-off-by: Guo Ren <ren_guo@c-sky.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
27 lines
548 B
C
27 lines
548 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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// Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
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#ifndef __ABI_REG_OPS_H
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#define __ABI_REG_OPS_H
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#include <asm/reg_ops.h>
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#define cprcr(reg) \
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({ \
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unsigned int tmp; \
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asm volatile("cprcr %0, "reg"\n":"=b"(tmp)); \
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tmp; \
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})
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#define cpwcr(reg, val) \
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({ \
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asm volatile("cpwcr %0, "reg"\n"::"b"(val)); \
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})
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static inline unsigned int mfcr_hint(void)
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{
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return mfcr("cr30");
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}
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static inline unsigned int mfcr_ccr2(void) { return 0; }
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#endif /* __ABI_REG_OPS_H */
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