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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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4a4f51e9b6
Signed-off-by: Vikas Chaudhary <vikas.chaudhary@qlogic.com> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
256 lines
6.1 KiB
C
256 lines
6.1 KiB
C
/*
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* QLogic iSCSI HBA Driver
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* Copyright (c) 2003-2013 QLogic Corporation
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*
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* See LICENSE.qla4xxx for copyright and licensing details.
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*/
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#include "ql4_def.h"
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#include "ql4_glbl.h"
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#include "ql4_dbg.h"
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#include "ql4_inline.h"
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static inline void eeprom_cmd(uint32_t cmd, struct scsi_qla_host *ha)
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{
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writel(cmd, isp_nvram(ha));
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readl(isp_nvram(ha));
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udelay(1);
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}
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static inline int eeprom_size(struct scsi_qla_host *ha)
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{
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return is_qla4010(ha) ? FM93C66A_SIZE_16 : FM93C86A_SIZE_16;
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}
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static inline int eeprom_no_addr_bits(struct scsi_qla_host *ha)
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{
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return is_qla4010(ha) ? FM93C56A_NO_ADDR_BITS_16 :
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FM93C86A_NO_ADDR_BITS_16 ;
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}
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static inline int eeprom_no_data_bits(struct scsi_qla_host *ha)
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{
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return FM93C56A_DATA_BITS_16;
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}
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static int fm93c56a_select(struct scsi_qla_host * ha)
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{
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DEBUG5(printk(KERN_ERR "fm93c56a_select:\n"));
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ha->eeprom_cmd_data = AUBURN_EEPROM_CS_1 | 0x000f0000;
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eeprom_cmd(ha->eeprom_cmd_data, ha);
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return 1;
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}
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static int fm93c56a_cmd(struct scsi_qla_host * ha, int cmd, int addr)
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{
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int i;
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int mask;
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int dataBit;
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int previousBit;
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/* Clock in a zero, then do the start bit. */
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eeprom_cmd(ha->eeprom_cmd_data | AUBURN_EEPROM_DO_1, ha);
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eeprom_cmd(ha->eeprom_cmd_data | AUBURN_EEPROM_DO_1 |
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AUBURN_EEPROM_CLK_RISE, ha);
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eeprom_cmd(ha->eeprom_cmd_data | AUBURN_EEPROM_DO_1 |
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AUBURN_EEPROM_CLK_FALL, ha);
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mask = 1 << (FM93C56A_CMD_BITS - 1);
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/* Force the previous data bit to be different. */
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previousBit = 0xffff;
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for (i = 0; i < FM93C56A_CMD_BITS; i++) {
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dataBit =
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(cmd & mask) ? AUBURN_EEPROM_DO_1 : AUBURN_EEPROM_DO_0;
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if (previousBit != dataBit) {
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/*
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* If the bit changed, then change the DO state to
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* match.
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*/
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eeprom_cmd(ha->eeprom_cmd_data | dataBit, ha);
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previousBit = dataBit;
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}
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eeprom_cmd(ha->eeprom_cmd_data | dataBit |
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AUBURN_EEPROM_CLK_RISE, ha);
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eeprom_cmd(ha->eeprom_cmd_data | dataBit |
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AUBURN_EEPROM_CLK_FALL, ha);
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cmd = cmd << 1;
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}
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mask = 1 << (eeprom_no_addr_bits(ha) - 1);
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/* Force the previous data bit to be different. */
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previousBit = 0xffff;
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for (i = 0; i < eeprom_no_addr_bits(ha); i++) {
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dataBit = addr & mask ? AUBURN_EEPROM_DO_1 :
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AUBURN_EEPROM_DO_0;
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if (previousBit != dataBit) {
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/*
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* If the bit changed, then change the DO state to
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* match.
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*/
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eeprom_cmd(ha->eeprom_cmd_data | dataBit, ha);
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previousBit = dataBit;
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}
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eeprom_cmd(ha->eeprom_cmd_data | dataBit |
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AUBURN_EEPROM_CLK_RISE, ha);
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eeprom_cmd(ha->eeprom_cmd_data | dataBit |
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AUBURN_EEPROM_CLK_FALL, ha);
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addr = addr << 1;
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}
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return 1;
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}
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static int fm93c56a_deselect(struct scsi_qla_host * ha)
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{
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ha->eeprom_cmd_data = AUBURN_EEPROM_CS_0 | 0x000f0000;
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eeprom_cmd(ha->eeprom_cmd_data, ha);
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return 1;
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}
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static int fm93c56a_datain(struct scsi_qla_host * ha, unsigned short *value)
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{
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int i;
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int data = 0;
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int dataBit;
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/* Read the data bits
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* The first bit is a dummy. Clock right over it. */
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for (i = 0; i < eeprom_no_data_bits(ha); i++) {
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eeprom_cmd(ha->eeprom_cmd_data |
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AUBURN_EEPROM_CLK_RISE, ha);
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eeprom_cmd(ha->eeprom_cmd_data |
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AUBURN_EEPROM_CLK_FALL, ha);
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dataBit = (readw(isp_nvram(ha)) & AUBURN_EEPROM_DI_1) ? 1 : 0;
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data = (data << 1) | dataBit;
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}
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*value = data;
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return 1;
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}
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static int eeprom_readword(int eepromAddr, u16 * value,
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struct scsi_qla_host * ha)
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{
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fm93c56a_select(ha);
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fm93c56a_cmd(ha, FM93C56A_READ, eepromAddr);
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fm93c56a_datain(ha, value);
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fm93c56a_deselect(ha);
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return 1;
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}
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/* Hardware_lock must be set before calling */
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u16 rd_nvram_word(struct scsi_qla_host * ha, int offset)
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{
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u16 val = 0;
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/* NOTE: NVRAM uses half-word addresses */
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eeprom_readword(offset, &val, ha);
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return val;
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}
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u8 rd_nvram_byte(struct scsi_qla_host *ha, int offset)
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{
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u16 val = 0;
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u8 rval = 0;
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int index = 0;
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if (offset & 0x1)
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index = (offset - 1) / 2;
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else
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index = offset / 2;
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val = le16_to_cpu(rd_nvram_word(ha, index));
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if (offset & 0x1)
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rval = (u8)((val & 0xff00) >> 8);
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else
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rval = (u8)((val & 0x00ff));
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return rval;
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}
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int qla4xxx_is_nvram_configuration_valid(struct scsi_qla_host * ha)
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{
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int status = QLA_ERROR;
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uint16_t checksum = 0;
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uint32_t index;
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unsigned long flags;
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spin_lock_irqsave(&ha->hardware_lock, flags);
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for (index = 0; index < eeprom_size(ha); index++)
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checksum += rd_nvram_word(ha, index);
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spin_unlock_irqrestore(&ha->hardware_lock, flags);
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if (checksum == 0)
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status = QLA_SUCCESS;
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return status;
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}
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/*************************************************************************
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*
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* Hardware Semaphore routines
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*
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*************************************************************************/
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int ql4xxx_sem_spinlock(struct scsi_qla_host * ha, u32 sem_mask, u32 sem_bits)
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{
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uint32_t value;
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unsigned long flags;
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unsigned int seconds = 30;
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DEBUG2(printk("scsi%ld : Trying to get SEM lock - mask= 0x%x, code = "
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"0x%x\n", ha->host_no, sem_mask, sem_bits));
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do {
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spin_lock_irqsave(&ha->hardware_lock, flags);
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writel((sem_mask | sem_bits), isp_semaphore(ha));
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value = readw(isp_semaphore(ha));
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spin_unlock_irqrestore(&ha->hardware_lock, flags);
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if ((value & (sem_mask >> 16)) == sem_bits) {
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DEBUG2(printk("scsi%ld : Got SEM LOCK - mask= 0x%x, "
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"code = 0x%x\n", ha->host_no,
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sem_mask, sem_bits));
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return QLA_SUCCESS;
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}
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ssleep(1);
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} while (--seconds);
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return QLA_ERROR;
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}
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void ql4xxx_sem_unlock(struct scsi_qla_host * ha, u32 sem_mask)
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{
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unsigned long flags;
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spin_lock_irqsave(&ha->hardware_lock, flags);
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writel(sem_mask, isp_semaphore(ha));
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readl(isp_semaphore(ha));
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spin_unlock_irqrestore(&ha->hardware_lock, flags);
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DEBUG2(printk("scsi%ld : UNLOCK SEM - mask= 0x%x\n", ha->host_no,
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sem_mask));
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}
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int ql4xxx_sem_lock(struct scsi_qla_host * ha, u32 sem_mask, u32 sem_bits)
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{
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uint32_t value;
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unsigned long flags;
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spin_lock_irqsave(&ha->hardware_lock, flags);
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writel((sem_mask | sem_bits), isp_semaphore(ha));
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value = readw(isp_semaphore(ha));
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spin_unlock_irqrestore(&ha->hardware_lock, flags);
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if ((value & (sem_mask >> 16)) == sem_bits) {
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DEBUG2(printk("scsi%ld : Got SEM LOCK - mask= 0x%x, code = "
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"0x%x, sema code=0x%x\n", ha->host_no,
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sem_mask, sem_bits, value));
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return 1;
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}
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return 0;
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}
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