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linux-stable/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi
Nícolas F. R. A. Prado 0dca9f0b3e arm64: dts: mediatek: asurada: Enable PCIe and add WiFi 
Enable MT8192's PCIe controller and add support for the MT7921e WiFi
card that is present on that bus for the Asurada platform.

Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tested-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20220629155956.1138955-15-nfraprado@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2022-07-07 16:39:17 +02:00

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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright (C) 2020 MediaTek Inc.
* Author: Seiya Wang <seiya.wang@mediatek.com>
*/
/dts-v1/;
#include "mt8192.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@40000000 {
device_type = "memory";
reg = <0 0x40000000 0 0x80000000>;
};
/* system wide LDO 1.8V power rail */
pp1800_ldo_g: regulator-1v8-g {
compatible = "regulator-fixed";
regulator-name = "pp1800_ldo_g";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&pp3300_g>;
};
/* system wide switching 3.3V power rail */
pp3300_g: regulator-3v3-g {
compatible = "regulator-fixed";
regulator-name = "pp3300_g";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&ppvar_sys>;
};
/* system wide LDO 3.3V power rail */
pp3300_ldo_z: regulator-3v3-z {
compatible = "regulator-fixed";
regulator-name = "pp3300_ldo_z";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&ppvar_sys>;
};
/* separately switched 3.3V power rail */
pp3300_u: regulator-3v3-u {
compatible = "regulator-fixed";
regulator-name = "pp3300_u";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
/* enable pin wired to GPIO controlled by EC */
vin-supply = <&pp3300_g>;
};
pp3300_wlan: regulator-3v3-wlan {
compatible = "regulator-fixed";
regulator-name = "pp3300_wlan";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
pinctrl-names = "default";
pinctrl-0 = <&pp3300_wlan_pins>;
enable-active-high;
gpio = <&pio 143 GPIO_ACTIVE_HIGH>;
};
/* system wide switching 5.0V power rail */
pp5000_a: regulator-5v0-a {
compatible = "regulator-fixed";
regulator-name = "pp5000_a";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&ppvar_sys>;
};
/* system wide semi-regulated power rail from battery or USB */
ppvar_sys: regulator-var-sys {
compatible = "regulator-fixed";
regulator-name = "ppvar_sys";
regulator-always-on;
regulator-boot-on;
};
reserved_memory: reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
wifi_restricted_dma_region: wifi@c0000000 {
compatible = "restricted-dma-pool";
reg = <0 0xc0000000 0 0x4000000>;
};
};
};
&i2c0 {
status = "okay";
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
touchscreen: touchscreen@10 {
reg = <0x10>;
interrupts-extended = <&pio 21 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&touchscreen_pins>;
};
};
&i2c1 {
status = "okay";
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
};
&i2c2 {
status = "okay";
clock-frequency = <400000>;
clock-stretch-ns = <12600>;
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins>;
trackpad@15 {
compatible = "elan,ekth3000";
reg = <0x15>;
interrupts-extended = <&pio 15 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&trackpad_pins>;
vcc-supply = <&pp3300_u>;
wakeup-source;
};
};
&i2c3 {
status = "okay";
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&i2c3_pins>;
};
&i2c7 {
status = "okay";
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&i2c7_pins>;
};
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pcie_pins>;
pcie0: pcie@0,0 {
device_type = "pci";
reg = <0x0000 0 0 0 0>;
num-lanes = <1>;
bus-range = <0x1 0x1>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi: wifi@0,0 {
reg = <0x10000 0 0 0 0x100000>,
<0x10000 0 0x100000 0 0x100000>;
memory-region = <&wifi_restricted_dma_region>;
};
};
};
&pio {
/* 220 lines */
gpio-line-names = "I2S_DP_LRCK",
"IS_DP_BCLK",
"I2S_DP_MCLK",
"I2S_DP_DATAOUT",
"SAR0_INT_ODL",
"EC_AP_INT_ODL",
"EDPBRDG_INT_ODL",
"DPBRDG_INT_ODL",
"DPBRDG_PWREN",
"DPBRDG_RST_ODL",
"I2S_HP_MCLK",
"I2S_HP_BCK",
"I2S_HP_LRCK",
"I2S_HP_DATAIN",
/*
* AP_FLASH_WP_L is crossystem ABI. Schematics
* call it AP_FLASH_WP_ODL.
*/
"AP_FLASH_WP_L",
"TRACKPAD_INT_ODL",
"EC_AP_HPD_OD",
"SD_CD_ODL",
"HP_INT_ODL_ALC",
"EN_PP1000_DPBRDG",
"AP_GPIO20",
"TOUCH_INT_L_1V8",
"UART_BT_WAKE_ODL",
"AP_GPIO23",
"AP_SPI_FLASH_CS_L",
"AP_SPI_FLASH_CLK",
"EN_PP3300_DPBRDG_DX",
"AP_SPI_FLASH_MOSI",
"AP_SPI_FLASH_MISO",
"I2S_HP_DATAOUT",
"AP_GPIO30",
"I2S_SPKR_MCLK",
"I2S_SPKR_BCLK",
"I2S_SPKR_LRCK",
"I2S_SPKR_DATAIN",
"I2S_SPKR_DATAOUT",
"AP_SPI_H1_TPM_CLK",
"AP_SPI_H1_TPM_CS_L",
"AP_SPI_H1_TPM_MISO",
"AP_SPI_H1_TPM_MOSI",
"BL_PWM",
"EDPBRDG_PWREN",
"EDPBRDG_RST_ODL",
"EN_PP3300_HUB",
"HUB_RST_L",
"",
"",
"",
"",
"",
"",
"SD_CLK",
"SD_CMD",
"SD_DATA3",
"SD_DATA0",
"SD_DATA2",
"SD_DATA1",
"",
"",
"",
"",
"",
"",
"PCIE_WAKE_ODL",
"PCIE_RST_L",
"PCIE_CLKREQ_ODL",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"SPMI_SCL",
"SPMI_SDA",
"AP_GOOD",
"UART_DBG_TX_AP_RX",
"UART_AP_TX_DBG_RX",
"UART_AP_TX_BT_RX",
"UART_BT_TX_AP_RX",
"MIPI_DPI_D0_R",
"MIPI_DPI_D1_R",
"MIPI_DPI_D2_R",
"MIPI_DPI_D3_R",
"MIPI_DPI_D4_R",
"MIPI_DPI_D5_R",
"MIPI_DPI_D6_R",
"MIPI_DPI_D7_R",
"MIPI_DPI_D8_R",
"MIPI_DPI_D9_R",
"MIPI_DPI_D10_R",
"",
"",
"MIPI_DPI_DE_R",
"MIPI_DPI_D11_R",
"MIPI_DPI_VSYNC_R",
"MIPI_DPI_CLK_R",
"MIPI_DPI_HSYNC_R",
"PCM_BT_DATAIN",
"PCM_BT_SYNC",
"PCM_BT_DATAOUT",
"PCM_BT_CLK",
"AP_I2C_AUDIO_SCL",
"AP_I2C_AUDIO_SDA",
"SCP_I2C_SCL",
"SCP_I2C_SDA",
"AP_I2C_WLAN_SCL",
"AP_I2C_WLAN_SDA",
"AP_I2C_DPBRDG_SCL",
"AP_I2C_DPBRDG_SDA",
"EN_PP1800_DPBRDG_DX",
"EN_PP3300_EDP_DX",
"EN_PP1800_EDPBRDG_DX",
"EN_PP1000_EDPBRDG",
"SCP_JTAG0_TDO",
"SCP_JTAG0_TDI",
"SCP_JTAG0_TMS",
"SCP_JTAG0_TCK",
"SCP_JTAG0_TRSTN",
"EN_PP3000_VMC_PMU",
"EN_PP3300_DISPLAY_DX",
"TOUCH_RST_L_1V8",
"TOUCH_REPORT_DISABLE",
"",
"",
"AP_I2C_TRACKPAD_SCL_1V8",
"AP_I2C_TRACKPAD_SDA_1V8",
"EN_PP3300_WLAN",
"BT_KILL_L",
"WIFI_KILL_L",
"SET_VMC_VOLT_AT_1V8",
"EN_SPK",
"AP_WARM_RST_REQ",
"",
"",
"EN_PP3000_SD_S3",
"AP_EDP_BKLTEN",
"",
"",
"",
"AP_SPI_EC_CLK",
"AP_SPI_EC_CS_L",
"AP_SPI_EC_MISO",
"AP_SPI_EC_MOSI",
"AP_I2C_EDPBRDG_SCL",
"AP_I2C_EDPBRDG_SDA",
"MT6315_PROC_INT",
"MT6315_GPU_INT",
"UART_SERVO_TX_SCP_RX",
"UART_SCP_TX_SERVO_RX",
"BT_RTS_AP_CTS",
"AP_RTS_BT_CTS",
"UART_AP_WAKE_BT_ODL",
"WLAN_ALERT_ODL",
"EC_IN_RW_ODL",
"H1_AP_INT_ODL",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"MSDC0_CMD",
"MSDC0_DAT0",
"MSDC0_DAT2",
"MSDC0_DAT4",
"MSDC0_DAT6",
"MSDC0_DAT1",
"MSDC0_DAT5",
"MSDC0_DAT7",
"MSDC0_DSL",
"MSDC0_CLK",
"MSDC0_DAT3",
"MSDC0_RST_L",
"SCP_VREQ_VAO",
"AUD_DAT_MOSI2",
"AUD_NLE_MOSI1",
"AUD_NLE_MOSI0",
"AUD_DAT_MISO2",
"AP_I2C_SAR_SDA",
"AP_I2C_SAR_SCL",
"AP_I2C_PWR_SCL",
"AP_I2C_PWR_SDA",
"AP_I2C_TS_SCL_1V8",
"AP_I2C_TS_SDA_1V8",
"SRCLKENA0",
"SRCLKENA1",
"AP_EC_WATCHDOG_L",
"PWRAP_SPI0_MI",
"PWRAP_SPI0_CSN",
"PWRAP_SPI0_MO",
"PWRAP_SPI0_CK",
"AP_RTC_CLK32K",
"AUD_CLK_MOSI",
"AUD_SYNC_MOSI",
"AUD_DAT_MOSI0",
"AUD_DAT_MOSI1",
"AUD_DAT_MISO0",
"AUD_DAT_MISO1";
cr50_int: cr50-irq-default-pins {
pins-gsc-ap-int-odl {
pinmux = <PINMUX_GPIO171__FUNC_GPIO171>;
input-enable;
};
};
cros_ec_int: cros-ec-irq-default-pins {
pins-ec-ap-int-odl {
pinmux = <PINMUX_GPIO5__FUNC_GPIO5>;
input-enable;
bias-pull-up;
};
};
i2c0_pins: i2c0-default-pins {
pins-bus {
pinmux = <PINMUX_GPIO204__FUNC_SCL0>,
<PINMUX_GPIO205__FUNC_SDA0>;
bias-pull-up = <MTK_PULL_SET_RSEL_011>;
drive-strength-microamp = <1000>;
};
};
i2c1_pins: i2c1-default-pins {
pins-bus {
pinmux = <PINMUX_GPIO118__FUNC_SCL1>,
<PINMUX_GPIO119__FUNC_SDA1>;
bias-pull-up = <MTK_PULL_SET_RSEL_011>;
drive-strength-microamp = <1000>;
};
};
i2c2_pins: i2c2-default-pins {
pins-bus {
pinmux = <PINMUX_GPIO141__FUNC_SCL2>,
<PINMUX_GPIO142__FUNC_SDA2>;
bias-pull-up = <MTK_PULL_SET_RSEL_011>;
};
};
i2c3_pins: i2c3-default-pins {
pins-bus {
pinmux = <PINMUX_GPIO160__FUNC_SCL3>,
<PINMUX_GPIO161__FUNC_SDA3>;
bias-disable;
drive-strength-microamp = <1000>;
};
};
i2c7_pins: i2c7-default-pins {
pins-bus {
pinmux = <PINMUX_GPIO124__FUNC_SCL7>,
<PINMUX_GPIO125__FUNC_SDA7>;
bias-disable;
drive-strength-microamp = <1000>;
};
};
pcie_pins: pcie-default-pins {
pins-pcie-wake {
pinmux = <PINMUX_GPIO63__FUNC_PCIE_WAKE_N>;
bias-pull-up;
};
pins-pcie-pereset {
pinmux = <PINMUX_GPIO64__FUNC_PCIE_PERESET_N>;
};
pins-pcie-clkreq {
pinmux = <PINMUX_GPIO65__FUNC_PCIE_CLKREQ_N>;
bias-pull-up;
};
pins-wifi-kill {
pinmux = <PINMUX_GPIO145__FUNC_GPIO145>; /* WIFI_KILL_L */
output-high;
};
};
pp3300_wlan_pins: pp3300-wlan-pins {
pins-pcie-en-pp3300-wlan {
pinmux = <PINMUX_GPIO143__FUNC_GPIO143>;
output-high;
};
};
spi1_pins: spi1-default-pins {
pins-cs-mosi-clk {
pinmux = <PINMUX_GPIO157__FUNC_SPI1_A_CSB>,
<PINMUX_GPIO159__FUNC_SPI1_A_MO>,
<PINMUX_GPIO156__FUNC_SPI1_A_CLK>;
bias-disable;
};
pins-miso {
pinmux = <PINMUX_GPIO158__FUNC_SPI1_A_MI>;
bias-pull-down;
};
};
spi5_pins: spi5-default-pins {
pins-bus {
pinmux = <PINMUX_GPIO38__FUNC_SPI5_A_MI>,
<PINMUX_GPIO37__FUNC_GPIO37>,
<PINMUX_GPIO39__FUNC_SPI5_A_MO>,
<PINMUX_GPIO36__FUNC_SPI5_A_CLK>;
bias-disable;
};
};
trackpad_pins: trackpad-default-pins {
pins-int-n {
pinmux = <PINMUX_GPIO15__FUNC_GPIO15>;
input-enable;
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
};
};
touchscreen_pins: touchscreen-default-pins {
pins-irq {
pinmux = <PINMUX_GPIO21__FUNC_GPIO21>;
input-enable;
bias-pull-up;
};
pins-reset {
pinmux = <PINMUX_GPIO137__FUNC_GPIO137>;
output-high;
};
pins-report-sw {
pinmux = <PINMUX_GPIO138__FUNC_GPIO138>;
output-low;
};
};
};
&spi1 {
status = "okay";
mediatek,pad-select = <0>;
pinctrl-names = "default";
pinctrl-0 = <&spi1_pins>;
cros_ec: ec@0 {
compatible = "google,cros-ec-spi";
reg = <0>;
interrupts-extended = <&pio 5 IRQ_TYPE_LEVEL_LOW>;
spi-max-frequency = <3000000>;
pinctrl-names = "default";
pinctrl-0 = <&cros_ec_int>;
#address-cells = <1>;
#size-cells = <0>;
base_detection: cbas {
compatible = "google,cros-cbas";
};
cros_ec_pwm: pwm {
compatible = "google,cros-ec-pwm";
#pwm-cells = <1>;
status = "disabled";
};
i2c_tunnel: i2c-tunnel {
compatible = "google,cros-ec-i2c-tunnel";
google,remote-bus = <0>;
#address-cells = <1>;
#size-cells = <0>;
};
mt6360_ldo3_reg: regulator@0 {
compatible = "google,cros-ec-regulator";
reg = <0>;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
};
mt6360_ldo5_reg: regulator@1 {
compatible = "google,cros-ec-regulator";
reg = <1>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
typec {
compatible = "google,cros-ec-typec";
#address-cells = <1>;
#size-cells = <0>;
usb_c0: connector@0 {
compatible = "usb-c-connector";
reg = <0>;
label = "left";
power-role = "dual";
data-role = "host";
try-power-role = "source";
};
usb_c1: connector@1 {
compatible = "usb-c-connector";
reg = <1>;
label = "right";
power-role = "dual";
data-role = "host";
try-power-role = "source";
};
};
};
};
&spi5 {
status = "okay";
cs-gpios = <&pio 37 GPIO_ACTIVE_LOW>;
mediatek,pad-select = <0>;
pinctrl-names = "default";
pinctrl-0 = <&spi5_pins>;
cr50@0 {
compatible = "google,cr50";
reg = <0>;
interrupts-extended = <&pio 171 IRQ_TYPE_EDGE_RISING>;
spi-max-frequency = <1000000>;
pinctrl-names = "default";
pinctrl-0 = <&cr50_int>;
};
};
&uart0 {
status = "okay";
};
&xhci {
status = "okay";
wakeup-source;
vusb33-supply = <&pp3300_g>;
vbus-supply = <&pp5000_a>;
};
#include <arm/cros-ec-keyboard.dtsi>
#include <arm/cros-ec-sbs.dtsi>
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