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The 98DX3236, 98DX3336, 98DX4521 and variants have a different TCLK from the Armada XP (200MHz vs 250MHz). The CPU core clock is fixed at 800MHz. The clock gating options are a subset of those on the Armada XP. The core clock divider is different to the Armada XP also. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
23 lines
733 B
Text
23 lines
733 B
Text
Device Tree Clock bindings for cpu clock of Marvell EBU platforms
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Required properties:
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- compatible : shall be one of the following:
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"marvell,armada-xp-cpu-clock" - cpu clocks for Armada XP
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"marvell,mv98dx3236-cpu-clock" - cpu clocks for 98DX3236 SoC
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- reg : Address and length of the clock complex register set, followed
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by address and length of the PMU DFS registers
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- #clock-cells : should be set to 1.
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- clocks : shall be the input parent clock phandle for the clock.
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cpuclk: clock-complex@d0018700 {
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#clock-cells = <1>;
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compatible = "marvell,armada-xp-cpu-clock";
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reg = <0xd0018700 0xA0>, <0x1c054 0x10>;
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clocks = <&coreclk 1>;
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}
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cpu@0 {
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compatible = "marvell,sheeva-v7";
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reg = <0>;
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clocks = <&cpuclk 0>;
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};
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