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297565aa22
Modern compilers are perfectly capable of extracting parallelism from the XOR routines, provided that the prototypes reflect the nature of the input accurately, in particular, the fact that the input vectors are expected not to overlap. This is not documented explicitly, but is implied by the interchangeability of the various C routines, some of which use temporary variables while others don't: this means that these routines only behave identically for non-overlapping inputs. So let's decorate these input vectors with the __restrict modifier, which informs the compiler that there is no overlap. While at it, make the input-only vectors pointer-to-const as well. Tested-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Reviewed-by: Nick Desaulniers <ndesaulniers@google.com> Link: https://github.com/ClangBuiltLinux/linux/issues/563 Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
140 lines
3.1 KiB
C
140 lines
3.1 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Optimized xor_block operation for RAID4/5
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*
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* Copyright IBM Corp. 2016
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* Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>
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*/
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#include <linux/types.h>
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#include <linux/export.h>
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#include <linux/raid/xor.h>
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#include <asm/xor.h>
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static void xor_xc_2(unsigned long bytes, unsigned long * __restrict p1,
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const unsigned long * __restrict p2)
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{
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asm volatile(
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" larl 1,2f\n"
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" aghi %0,-1\n"
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" jm 3f\n"
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" srlg 0,%0,8\n"
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" ltgr 0,0\n"
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" jz 1f\n"
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"0: xc 0(256,%1),0(%2)\n"
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" la %1,256(%1)\n"
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" la %2,256(%2)\n"
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" brctg 0,0b\n"
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"1: ex %0,0(1)\n"
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" j 3f\n"
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"2: xc 0(1,%1),0(%2)\n"
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"3:\n"
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: : "d" (bytes), "a" (p1), "a" (p2)
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: "0", "1", "cc", "memory");
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}
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static void xor_xc_3(unsigned long bytes, unsigned long * __restrict p1,
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const unsigned long * __restrict p2,
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const unsigned long * __restrict p3)
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{
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asm volatile(
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" larl 1,2f\n"
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" aghi %0,-1\n"
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" jm 3f\n"
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" srlg 0,%0,8\n"
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" ltgr 0,0\n"
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" jz 1f\n"
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"0: xc 0(256,%1),0(%2)\n"
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" xc 0(256,%1),0(%3)\n"
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" la %1,256(%1)\n"
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" la %2,256(%2)\n"
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" la %3,256(%3)\n"
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" brctg 0,0b\n"
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"1: ex %0,0(1)\n"
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" ex %0,6(1)\n"
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" j 3f\n"
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"2: xc 0(1,%1),0(%2)\n"
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" xc 0(1,%1),0(%3)\n"
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"3:\n"
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: "+d" (bytes), "+a" (p1), "+a" (p2), "+a" (p3)
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: : "0", "1", "cc", "memory");
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}
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static void xor_xc_4(unsigned long bytes, unsigned long * __restrict p1,
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const unsigned long * __restrict p2,
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const unsigned long * __restrict p3,
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const unsigned long * __restrict p4)
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{
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asm volatile(
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" larl 1,2f\n"
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" aghi %0,-1\n"
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" jm 3f\n"
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" srlg 0,%0,8\n"
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" ltgr 0,0\n"
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" jz 1f\n"
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"0: xc 0(256,%1),0(%2)\n"
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" xc 0(256,%1),0(%3)\n"
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" xc 0(256,%1),0(%4)\n"
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" la %1,256(%1)\n"
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" la %2,256(%2)\n"
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" la %3,256(%3)\n"
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" la %4,256(%4)\n"
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" brctg 0,0b\n"
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"1: ex %0,0(1)\n"
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" ex %0,6(1)\n"
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" ex %0,12(1)\n"
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" j 3f\n"
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"2: xc 0(1,%1),0(%2)\n"
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" xc 0(1,%1),0(%3)\n"
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" xc 0(1,%1),0(%4)\n"
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"3:\n"
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: "+d" (bytes), "+a" (p1), "+a" (p2), "+a" (p3), "+a" (p4)
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: : "0", "1", "cc", "memory");
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}
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static void xor_xc_5(unsigned long bytes, unsigned long * __restrict p1,
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const unsigned long * __restrict p2,
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const unsigned long * __restrict p3,
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const unsigned long * __restrict p4,
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const unsigned long * __restrict p5)
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{
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asm volatile(
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" larl 1,2f\n"
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" aghi %0,-1\n"
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" jm 3f\n"
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" srlg 0,%0,8\n"
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" ltgr 0,0\n"
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" jz 1f\n"
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"0: xc 0(256,%1),0(%2)\n"
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" xc 0(256,%1),0(%3)\n"
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" xc 0(256,%1),0(%4)\n"
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" xc 0(256,%1),0(%5)\n"
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" la %1,256(%1)\n"
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" la %2,256(%2)\n"
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" la %3,256(%3)\n"
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" la %4,256(%4)\n"
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" la %5,256(%5)\n"
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" brctg 0,0b\n"
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"1: ex %0,0(1)\n"
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" ex %0,6(1)\n"
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" ex %0,12(1)\n"
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" ex %0,18(1)\n"
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" j 3f\n"
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"2: xc 0(1,%1),0(%2)\n"
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" xc 0(1,%1),0(%3)\n"
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" xc 0(1,%1),0(%4)\n"
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" xc 0(1,%1),0(%5)\n"
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"3:\n"
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: "+d" (bytes), "+a" (p1), "+a" (p2), "+a" (p3), "+a" (p4),
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"+a" (p5)
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: : "0", "1", "cc", "memory");
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}
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struct xor_block_template xor_block_xc = {
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.name = "xc",
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.do_2 = xor_xc_2,
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.do_3 = xor_xc_3,
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.do_4 = xor_xc_4,
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.do_5 = xor_xc_5,
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};
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EXPORT_SYMBOL(xor_block_xc);
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