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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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dfab34aa61
Device-tree updates for 3.10. The bulk of the churn in this branch is due to i.MX moving from C-defined pin control over to device tree, which is a one-time conversion that will allow greater flexibility down the road. Besides that, there's PCI-e bindings for Marvell mvebu platforms and a handful of cleanups to tegra due to the new include file functionality of the device tree compiler. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJRgg+aAAoJEIwa5zzehBx3/q0P/RumfsMePxhmSU4HM16a3w0B 9jg7wd9BxVrJUzTY9F7z+Q72x0u5USUtVnyoY5s68DQMkFyhBQUuKCCiwCqtpCBN 2Uf0JQjYHdqEFKgN6DiPxSVRPXC8jmMzYGRk5RTI5kVWxaBEMdw9rTo0x4vol/Cv 7Z+W+gixXZbgydH/ogqly1MQc9vWliRTfU2zv2WOZ7TLyyEd2lOjMMBIX/n3vI4l T32JOUDgIYK841s9n2eNQGEjqB/OghMMrQsdjUAd++je6QtqgZk9+uHfPFC1C0wQ 3F93te9HleluYcOcxGmedK3B9QO2Y8y1XHe+uxLZVKXBR+6/5AtSwZFRQm10uMCI JUz3j6tRAWDAOin2vXZcf2CVPn5HZbh3D67WuUdfxMngH0XHvSZRC9eRd70jWvDe 9FY4NRTjRSLu/VtgCzF8tSA3cEylhyKYdK6Cf0nbwQ26JTO2VNNCnjuCbRfWp+E1 y0jIQwsaiNLEBwbesNbnFrj+YTTAZBI4+Y5HrSV7Og5/5X9BWs11KAkRppNOj0Uc WnqG26SssuBNBVHPOO2RrOwq3n2VphQ/BB8j9yrpWtcAlQxdjmVqFj/GIIiHr2Wm GuKWgM5fn+xF0oeCriq4Ti5eCJQ7Ev6Er46WrGQDBniZWVi05aP51ks1bfwbfHqn z1o5QfLpr4PkJPk0mnim =8X1b -----END PGP SIGNATURE----- Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC device-tree updates from Olof Johansson: "Part 1 of device-tree updates for 3.10. The bulk of the churn in this branch is due to i.MX moving from C-defined pin control over to device tree, which is a one-time conversion that will allow greater flexibility down the road. Besides that, there's PCI-e bindings for Marvell mvebu platforms and a handful of cleanups to tegra due to the new include file functionality of the device tree compiler" * tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (113 commits) arm: mvebu: PCIe Device Tree informations for Armada XP GP arm: mvebu: PCIe Device Tree informations for Armada 370 DB arm: mvebu: PCIe Device Tree informations for Armada 370 Mirabox arm: mvebu: PCIe Device Tree informations for Armada XP DB arm: mvebu: PCIe Device Tree informations for OpenBlocks AX3-4 arm: mvebu: add PCIe Device Tree informations for Armada XP arm: mvebu: add PCIe Device Tree informations for Armada 370 ARM: sunxi: unify osc24M_fixed and osc24M arm: vt8500: Add SDHC support to WM8505 DT ARM: dts: Add a 64 bits version of the skeleton device tree ARM: mvebu: Add Device Bus and CFI flash memory support to defconfig ARM: mvebu: Add support for NOR flash device on Openblocks AX3 board ARM: mvebu: Add support for NOR flash device on Armada XP-GP board ARM: mvebu: Add Device Bus support for Armada 370/XP SoC ARM: dts: imx6dl-wandboard: Add USB Host support ARM: dts: imx51 cpu node ARM: dts: Add missing imx27-phytec-phycore dtb target ARM: dts: Add NFC support for i.MX27 Phytec PCM038 module ARM: i.MX51: Add PATA support ARM: dts: Add initial support for Wandboard Dual-Lite ...
125 lines
2.1 KiB
Text
125 lines
2.1 KiB
Text
/*
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* at91sam9n12ek.dts - Device Tree file for AT91SAM9N12-EK board
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*
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* Copyright (C) 2012 Atmel,
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* 2012 Hong Xu <hong.xu@atmel.com>
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*
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* Licensed under GPLv2 or later.
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*/
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/dts-v1/;
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/include/ "at91sam9n12.dtsi"
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/ {
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model = "Atmel AT91SAM9N12-EK";
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compatible = "atmel,at91sam9n12ek", "atmel,at91sam9n12", "atmel,at91sam9";
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chosen {
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bootargs = "mem=128M console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=jffs2";
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};
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memory {
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reg = <0x20000000 0x10000000>;
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};
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clocks {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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main_clock: clock@0 {
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compatible = "atmel,osc", "fixed-clock";
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clock-frequency = <16000000>;
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};
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};
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ahb {
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apb {
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dbgu: serial@fffff200 {
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status = "okay";
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};
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i2c0: i2c@f8010000 {
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status = "okay";
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};
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i2c1: i2c@f8014000 {
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status = "okay";
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};
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mmc0: mmc@f0008000 {
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pinctrl-0 = <
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&pinctrl_board_mmc0
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&pinctrl_mmc0_slot0_clk_cmd_dat0
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&pinctrl_mmc0_slot0_dat1_3>;
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status = "okay";
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slot@0 {
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reg = <0>;
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bus-width = <4>;
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cd-gpios = <&pioA 7 0>;
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};
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};
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pinctrl@fffff400 {
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mmc0 {
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pinctrl_board_mmc0: mmc0-board {
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atmel,pins =
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<0 7 0x0 0x5>; /* PA7 gpio CD pin pull up and deglitch */
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};
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};
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};
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spi0: spi@f0000000 {
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status = "okay";
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cs-gpios = <&pioA 14 0>, <0>, <0>, <0>;
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m25p80@0 {
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compatible = "atmel,at25df321a";
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spi-max-frequency = <50000000>;
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reg = <0>;
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};
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};
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};
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nand0: nand@40000000 {
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nand-bus-width = <8>;
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nand-ecc-mode = "hw";
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atmel,has-pmecc;
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atmel,pmecc-cap = <2>;
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atmel,pmecc-sector-size = <512>;
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nand-on-flash-bbt;
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status = "okay";
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};
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};
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leds {
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compatible = "gpio-leds";
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d8 {
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label = "d8";
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gpios = <&pioB 4 1>;
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linux,default-trigger = "mmc0";
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};
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d9 {
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label = "d6";
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gpios = <&pioB 5 1>;
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linux,default-trigger = "nand-disk";
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};
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d10 {
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label = "d7";
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gpios = <&pioB 6 0>;
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linux,default-trigger = "heartbeat";
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};
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};
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gpio_keys {
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compatible = "gpio-keys";
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enter {
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label = "Enter";
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gpios = <&pioB 4 1>;
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linux,code = <28>;
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gpio-key,wakeup;
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};
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};
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};
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