linux-stable/drivers/pinctrl/intel
Andy Shevchenko 0fa86fc2e2 pinctrl: merrifield: Set default bias in case no particular value given
When GPIO library asks pin control to set the bias, it doesn't pass
any value of it and argument is considered boolean (and this is true
for ACPI GpioIo() / GpioInt() resources, by the way). Thus, individual
drivers must behave well, when they got the resistance value of 1 Ohm,
i.e. transforming it to sane default.

In case of Intel Merrifield pin control hardware the 20 kOhm sounds plausible
because it gives a good trade off between weakness and minimization of leakage
current (will be only 50 uA with the above choice).

Fixes: 4e80c8f505 ("pinctrl: intel: Add Intel Merrifield pin controller support")
Depends-on: 2956b5d94a ("pinctrl / gpio: Introduce .set_config() callback for GPIO chips")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
2020-11-12 15:57:33 +02:00
..
Kconfig pinctrl: intel: Add Intel Alder Lake-S pin controller support 2020-11-04 12:33:19 +02:00
Makefile pinctrl: intel: Add Intel Alder Lake-S pin controller support 2020-11-04 12:33:19 +02:00
pinctrl-alderlake.c pinctrl: intel: Add Intel Alder Lake-S pin controller support 2020-11-04 12:33:19 +02:00
pinctrl-baytrail.c pinctrl: baytrail: Switch to use intel_pinctrl_get_soc_data() 2020-08-20 12:37:07 +03:00
pinctrl-broxton.c pinctrl: broxton: Provide Interrupt Status register offset 2019-08-07 16:45:41 +03:00
pinctrl-cannonlake.c pinctrl: cannonlake: Modify COMMUNITY macros to be consistent 2020-09-30 11:43:56 +02:00
pinctrl-cedarfork.c pinctrl: cedarfork: Update pin names according to v1.13c 2019-04-03 14:49:47 +03:00
pinctrl-cherryview.c pinctrl: cherryview: Preserve CHV_PADCTRL1_INVRXTX_TXDATA flag on GPIOs 2020-09-07 11:57:19 +03:00
pinctrl-denverton.c pinctrl: denverton: Update pin names according to v1.08 2019-08-08 12:57:01 +03:00
pinctrl-elkhartlake.c pinctrl: intel: Add Intel Elkhart Lake pin controller support 2020-11-04 12:33:19 +02:00
pinctrl-emmitsburg.c pinctrl: intel: Add Intel Emmitsburg pin controller support 2020-07-21 11:44:21 +03:00
pinctrl-geminilake.c pinctrl: geminilake: Provide Interrupt Status register offset 2019-08-07 16:45:41 +03:00
pinctrl-icelake.c pinctrl: icelake: Use generic flag for special GPIO base treatment 2020-04-14 16:17:13 +03:00
pinctrl-intel.c pinctrl: intel: Set default bias in case no particular value given 2020-10-26 13:26:50 +02:00
pinctrl-intel.h pinctrl: intel: Update header block to reflect direct dependencies 2020-08-20 12:37:07 +03:00
pinctrl-jasperlake.c pinctrl: jasperlake: Fix HOSTSW_OWN offset 2020-11-12 15:55:47 +02:00
pinctrl-lakefield.c pinctrl: intel: Add Intel Lakefield pin controller support 2020-11-02 22:32:13 +02:00
pinctrl-lewisburg.c pinctrl: lewisburg: Update pin list according to v1.1v6 2019-11-21 15:04:16 +01:00
pinctrl-lynxpoint.c pinctrl: lynxpoint: Enable pin configuration setting for GPIO chip 2020-11-12 12:03:49 +02:00
pinctrl-merrifield.c pinctrl: merrifield: Set default bias in case no particular value given 2020-11-12 15:57:33 +02:00
pinctrl-sunrisepoint.c pinctrl: sunrisepoint: Modify COMMUNITY macros to be consistent 2020-09-30 11:43:56 +02:00
pinctrl-tigerlake.c pinctrl: tigerlake: Fix register offsets for TGL-H variant 2020-09-30 11:43:56 +02:00