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10314e09d0
All RISC-V platforms today lack an IOMMU. However, legacy PCI devices sometimes require DMA-memory to be in the low 32 bits. To make this work, we enable the software-based bounce buffers from swiotlb. They only impose overhead when the device in question cannot address the full 64-bit address space, so a perfect fit. This patch assumes that DMA is coherent with the processor and the PCI bus. It also assumes that the processor and devices share a common address space. This is true for all RISC-V platforms so far. [changelog stolen from an earlier patch by Palmer Dabbelt that did the more complicated swiotlb wireup before the recent consolidation] Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> |
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.. | ||
vdso | ||
.gitignore | ||
asm-offsets.c | ||
cacheinfo.c | ||
cpu.c | ||
cpufeature.c | ||
entry.S | ||
ftrace.c | ||
head.S | ||
irq.c | ||
Makefile | ||
mcount-dyn.S | ||
mcount.S | ||
module-sections.c | ||
module.c | ||
module.lds | ||
process.c | ||
ptrace.c | ||
reset.c | ||
riscv_ksyms.c | ||
setup.c | ||
signal.c | ||
smp.c | ||
smpboot.c | ||
stacktrace.c | ||
sys_riscv.c | ||
syscall_table.c | ||
time.c | ||
traps.c | ||
vdso.c | ||
vmlinux.lds.S |