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![Linus Walleij](/assets/img/avatar_default.png)
We cannot use bits from configuration registers as API between platforms and driver like this, abstract it out to two enums and mimic the stuff passed as device tree data. This is done to make it possible for the driver to generate the ccfg word on-the-fly so we can support more PL08x derivatives. Acked-by: Olof Johansson <olof@lixom.net> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
133 lines
4.5 KiB
C
133 lines
4.5 KiB
C
/*
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* linux/amba/pl08x.h - ARM PrimeCell DMA Controller driver
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*
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* Copyright (C) 2005 ARM Ltd
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* Copyright (C) 2010 ST-Ericsson SA
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* pl08x information required by platform code
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*
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* Please credit ARM.com
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* Documentation: ARM DDI 0196D
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*/
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#ifndef AMBA_PL08X_H
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#define AMBA_PL08X_H
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/* We need sizes of structs from this header */
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#include <linux/dmaengine.h>
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#include <linux/interrupt.h>
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struct pl08x_driver_data;
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struct pl08x_phy_chan;
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struct pl08x_txd;
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/* Bitmasks for selecting AHB ports for DMA transfers */
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enum {
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PL08X_AHB1 = (1 << 0),
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PL08X_AHB2 = (1 << 1)
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};
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/**
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* struct pl08x_channel_data - data structure to pass info between
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* platform and PL08x driver regarding channel configuration
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* @bus_id: name of this device channel, not just a device name since
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* devices may have more than one channel e.g. "foo_tx"
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* @min_signal: the minimum DMA signal number to be muxed in for this
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* channel (for platforms supporting muxed signals). If you have
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* static assignments, make sure this is set to the assigned signal
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* number, PL08x have 16 possible signals in number 0 thru 15 so
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* when these are not enough they often get muxed (in hardware)
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* disabling simultaneous use of the same channel for two devices.
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* @max_signal: the maximum DMA signal number to be muxed in for
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* the channel. Set to the same as min_signal for
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* devices with static assignments
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* @muxval: a number usually used to poke into some mux regiser to
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* mux in the signal to this channel
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* @addr: source/target address in physical memory for this DMA channel,
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* can be the address of a FIFO register for burst requests for example.
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* This can be left undefined if the PrimeCell API is used for configuring
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* this.
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* @single: the device connected to this channel will request single DMA
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* transfers, not bursts. (Bursts are default.)
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* @periph_buses: the device connected to this channel is accessible via
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* these buses (use PL08X_AHB1 | PL08X_AHB2).
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*/
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struct pl08x_channel_data {
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const char *bus_id;
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int min_signal;
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int max_signal;
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u32 muxval;
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dma_addr_t addr;
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bool single;
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u8 periph_buses;
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};
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enum pl08x_burst_size {
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PL08X_BURST_SZ_1,
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PL08X_BURST_SZ_4,
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PL08X_BURST_SZ_8,
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PL08X_BURST_SZ_16,
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PL08X_BURST_SZ_32,
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PL08X_BURST_SZ_64,
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PL08X_BURST_SZ_128,
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PL08X_BURST_SZ_256,
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};
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enum pl08x_bus_width {
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PL08X_BUS_WIDTH_8_BITS,
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PL08X_BUS_WIDTH_16_BITS,
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PL08X_BUS_WIDTH_32_BITS,
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};
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/**
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* struct pl08x_platform_data - the platform configuration for the PL08x
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* PrimeCells.
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* @slave_channels: the channels defined for the different devices on the
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* platform, all inclusive, including multiplexed channels. The available
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* physical channels will be multiplexed around these signals as they are
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* requested, just enumerate all possible channels.
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* @num_slave_channels: number of elements in the slave channel array
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* @memcpy_burst_size: the appropriate burst size for memcpy operations
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* @memcpy_bus_width: memory bus width
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* @memcpy_prot_buff: whether memcpy DMA is bufferable
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* @memcpy_prot_cache: whether memcpy DMA is cacheable
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* @get_xfer_signal: request a physical signal to be used for a DMA transfer
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* immediately: if there is some multiplexing or similar blocking the use
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* of the channel the transfer can be denied by returning less than zero,
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* else it returns the allocated signal number
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* @put_xfer_signal: indicate to the platform that this physical signal is not
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* running any DMA transfer and multiplexing can be recycled
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* @lli_buses: buses which LLIs can be fetched from: PL08X_AHB1 | PL08X_AHB2
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* @mem_buses: buses which memory can be accessed from: PL08X_AHB1 | PL08X_AHB2
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* @slave_map: DMA slave matching table
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* @slave_map_len: number of elements in @slave_map
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*/
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struct pl08x_platform_data {
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struct pl08x_channel_data *slave_channels;
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unsigned int num_slave_channels;
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enum pl08x_burst_size memcpy_burst_size;
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enum pl08x_bus_width memcpy_bus_width;
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bool memcpy_prot_buff;
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bool memcpy_prot_cache;
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int (*get_xfer_signal)(const struct pl08x_channel_data *);
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void (*put_xfer_signal)(const struct pl08x_channel_data *, int);
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u8 lli_buses;
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u8 mem_buses;
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const struct dma_slave_map *slave_map;
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int slave_map_len;
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};
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#ifdef CONFIG_AMBA_PL08X
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bool pl08x_filter_id(struct dma_chan *chan, void *chan_id);
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#else
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static inline bool pl08x_filter_id(struct dma_chan *chan, void *chan_id)
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{
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return false;
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}
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#endif
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#endif /* AMBA_PL08X_H */
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