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443be7960b
Recent netxen firmware has new scheme of generating MSI interrupts, it raises interrupt and blocks itself, waiting for driver to unmask. This reduces chance of spurious interrupts. The driver will be able to deal with older firmware as well. Signed-off-by: Dhananjay Phadke <dhananjay@netxen.com> Tested-by: Vernon Mauery <mauery@us.ibm.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
182 lines
7.5 KiB
C
182 lines
7.5 KiB
C
/*
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* Copyright (C) 2003 - 2006 NetXen, Inc.
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* All rights reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston,
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* MA 02111-1307, USA.
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*
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* The full GNU General Public License is included in this distribution
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* in the file called LICENSE.
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*
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* Contact Information:
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* info@netxen.com
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* NetXen,
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* 3965 Freedom Circle, Fourth floor,
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* Santa Clara, CA 95054
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*/
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#ifndef __NIC_PHAN_REG_H_
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#define __NIC_PHAN_REG_H_
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/*
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* CRB Registers or queue message done only at initialization time.
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*/
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#define NIC_CRB_BASE NETXEN_CAM_RAM(0x200)
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#define NETXEN_NIC_REG(X) (NIC_CRB_BASE+(X))
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#define CRB_PHAN_CNTRL_LO_OFFSET NETXEN_NIC_REG(0x00)
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#define CRB_PHAN_CNTRL_HI_OFFSET NETXEN_NIC_REG(0x04)
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#define CRB_CMD_PRODUCER_OFFSET NETXEN_NIC_REG(0x08)
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#define CRB_CMD_CONSUMER_OFFSET NETXEN_NIC_REG(0x0c)
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#define CRB_PAUSE_ADDR_LO NETXEN_NIC_REG(0x10) /* C0 EPG BUG */
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#define CRB_PAUSE_ADDR_HI NETXEN_NIC_REG(0x14)
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#define CRB_HOST_CMD_ADDR_HI NETXEN_NIC_REG(0x18) /* host add:cmd ring */
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#define CRB_HOST_CMD_ADDR_LO NETXEN_NIC_REG(0x1c)
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#define CRB_CMD_INTR_LOOP NETXEN_NIC_REG(0x20) /* 4 regs for perf */
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#define CRB_CMD_DMA_LOOP NETXEN_NIC_REG(0x24)
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#define CRB_RCV_INTR_LOOP NETXEN_NIC_REG(0x28)
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#define CRB_RCV_DMA_LOOP NETXEN_NIC_REG(0x2c)
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#define CRB_ENABLE_TX_INTR NETXEN_NIC_REG(0x30) /* phantom init status */
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#define CRB_MMAP_ADDR_3 NETXEN_NIC_REG(0x34)
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#define CRB_CMDPEG_CMDRING NETXEN_NIC_REG(0x38)
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#define CRB_HOST_DUMMY_BUF_ADDR_HI NETXEN_NIC_REG(0x3c)
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#define CRB_HOST_DUMMY_BUF_ADDR_LO NETXEN_NIC_REG(0x40)
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#define CRB_MMAP_ADDR_0 NETXEN_NIC_REG(0x44)
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#define CRB_MMAP_ADDR_1 NETXEN_NIC_REG(0x48)
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#define CRB_MMAP_ADDR_2 NETXEN_NIC_REG(0x4c)
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#define CRB_CMDPEG_STATE NETXEN_NIC_REG(0x50)
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#define CRB_MMAP_SIZE_0 NETXEN_NIC_REG(0x54)
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#define CRB_MMAP_SIZE_1 NETXEN_NIC_REG(0x58)
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#define CRB_MMAP_SIZE_2 NETXEN_NIC_REG(0x5c)
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#define CRB_MMAP_SIZE_3 NETXEN_NIC_REG(0x60)
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#define CRB_GLOBAL_INT_COAL NETXEN_NIC_REG(0x64) /* interrupt coalescing */
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#define CRB_INT_COAL_MODE NETXEN_NIC_REG(0x68)
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#define CRB_MAX_RCV_BUFS NETXEN_NIC_REG(0x6c)
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#define CRB_TX_INT_THRESHOLD NETXEN_NIC_REG(0x70)
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#define CRB_RX_PKT_TIMER NETXEN_NIC_REG(0x74)
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#define CRB_TX_PKT_TIMER NETXEN_NIC_REG(0x78)
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#define CRB_RX_PKT_CNT NETXEN_NIC_REG(0x7c)
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#define CRB_RX_TMR_CNT NETXEN_NIC_REG(0x80)
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#define CRB_RX_LRO_TIMER NETXEN_NIC_REG(0x84)
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#define CRB_RX_LRO_MID_TIMER NETXEN_NIC_REG(0x88)
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#define CRB_DMA_MAX_RCV_BUFS NETXEN_NIC_REG(0x8c)
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#define CRB_MAX_DMA_ENTRIES NETXEN_NIC_REG(0x90)
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#define CRB_XG_STATE NETXEN_NIC_REG(0x94) /* XG Link status */
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#define CRB_AGENT_GO NETXEN_NIC_REG(0x98) /* NIC pkt gen agent */
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#define CRB_AGENT_TX_SIZE NETXEN_NIC_REG(0x9c)
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#define CRB_AGENT_TX_TYPE NETXEN_NIC_REG(0xa0)
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#define CRB_AGENT_TX_ADDR NETXEN_NIC_REG(0xa4)
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#define CRB_AGENT_TX_MSS NETXEN_NIC_REG(0xa8)
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#define CRB_TX_STATE NETXEN_NIC_REG(0xac) /* Debug -performance */
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#define CRB_TX_COUNT NETXEN_NIC_REG(0xb0)
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#define CRB_RX_STATE NETXEN_NIC_REG(0xb4)
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#define CRB_RX_PERF_DEBUG_1 NETXEN_NIC_REG(0xb8)
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#define CRB_RX_LRO_CONTROL NETXEN_NIC_REG(0xbc) /* LRO On/OFF */
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#define CRB_RX_LRO_START_NUM NETXEN_NIC_REG(0xc0)
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#define CRB_MPORT_MODE NETXEN_NIC_REG(0xc4) /* Multiport Mode */
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#define CRB_CMD_RING_SIZE NETXEN_NIC_REG(0xc8)
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#define CRB_INT_VECTOR NETXEN_NIC_REG(0xd4)
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#define CRB_CTX_RESET NETXEN_NIC_REG(0xd8)
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#define CRB_HOST_STS_PROD NETXEN_NIC_REG(0xdc)
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#define CRB_HOST_STS_CONS NETXEN_NIC_REG(0xe0)
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#define CRB_PEG_CMD_PROD NETXEN_NIC_REG(0xe4)
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#define CRB_PEG_CMD_CONS NETXEN_NIC_REG(0xe8)
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#define CRB_HOST_BUFFER_PROD NETXEN_NIC_REG(0xec)
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#define CRB_HOST_BUFFER_CONS NETXEN_NIC_REG(0xf0)
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#define CRB_JUMBO_BUFFER_PROD NETXEN_NIC_REG(0xf4)
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#define CRB_JUMBO_BUFFER_CONS NETXEN_NIC_REG(0xf8)
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#define CRB_CMD_PRODUCER_OFFSET_1 NETXEN_NIC_REG(0x1ac)
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#define CRB_CMD_CONSUMER_OFFSET_1 NETXEN_NIC_REG(0x1b0)
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#define CRB_CMD_PRODUCER_OFFSET_2 NETXEN_NIC_REG(0x1b8)
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#define CRB_CMD_CONSUMER_OFFSET_2 NETXEN_NIC_REG(0x1bc)
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// 1c0 to 1cc used for signature reg
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#define CRB_CMD_PRODUCER_OFFSET_3 NETXEN_NIC_REG(0x1d0)
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#define CRB_CMD_CONSUMER_OFFSET_3 NETXEN_NIC_REG(0x1d4)
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#define CRB_TEMP_STATE NETXEN_NIC_REG(0x1b4)
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#define CRB_V2P_0 NETXEN_NIC_REG(0x290)
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#define CRB_V2P_1 NETXEN_NIC_REG(0x294)
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#define CRB_V2P_2 NETXEN_NIC_REG(0x298)
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#define CRB_V2P_3 NETXEN_NIC_REG(0x29c)
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#define CRB_V2P(port) (CRB_V2P_0+((port)*4))
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#define CRB_DRIVER_VERSION NETXEN_NIC_REG(0x2a0)
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/* sw int status/mask registers */
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#define CRB_SW_INT_MASK_0 NETXEN_NIC_REG(0x1d8)
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#define CRB_SW_INT_MASK_1 NETXEN_NIC_REG(0x1e0)
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#define CRB_SW_INT_MASK_2 NETXEN_NIC_REG(0x1e4)
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#define CRB_SW_INT_MASK_3 NETXEN_NIC_REG(0x1e8)
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/*
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* capabilities register, can be used to selectively enable/disable features
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* for backward compability
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*/
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#define CRB_NIC_CAPABILITIES_HOST NETXEN_NIC_REG(0x1a8)
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#define CRB_NIC_CAPABILITIES_FW NETXEN_NIC_REG(0x1dc)
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#define CRB_NIC_MSI_MODE_HOST NETXEN_NIC_REG(0x270)
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#define CRB_NIC_MSI_MODE_FW NETXEN_NIC_REG(0x274)
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#define INTR_SCHEME_PERPORT 0x1
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#define MSI_MODE_MULTIFUNC 0x1
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/* used for ethtool tests */
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#define CRB_SCRATCHPAD_TEST NETXEN_NIC_REG(0x280)
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/*
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* CrbPortPhanCntrHi/Lo is used to pass the address of HostPhantomIndex address
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* which can be read by the Phantom host to get producer/consumer indexes from
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* Phantom/Casper. If it is not HOST_SHARED_MEMORY, then the following
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* registers will be used for the addresses of the ring's shared memory
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* on the Phantom.
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*/
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#define nx_get_temp_val(x) ((x) >> 16)
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#define nx_get_temp_state(x) ((x) & 0xffff)
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#define nx_encode_temp(val, state) (((val) << 16) | (state))
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/* CRB registers per Rcv Descriptor ring */
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struct netxen_rcv_desc_crb {
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u32 crb_rcv_producer_offset __attribute__ ((aligned(512)));
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u32 crb_rcv_consumer_offset;
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u32 crb_globalrcv_ring;
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u32 crb_rcv_ring_size;
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};
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/*
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* CRB registers used by the receive peg logic.
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*/
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struct netxen_recv_crb {
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struct netxen_rcv_desc_crb rcv_desc_crb[NUM_RCV_DESC_RINGS];
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u32 crb_rcvstatus_ring;
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u32 crb_rcv_status_producer;
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u32 crb_rcv_status_consumer;
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u32 crb_rcvpeg_state;
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u32 crb_status_ring_size;
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};
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extern struct netxen_recv_crb recv_crb_registers[];
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/*
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* Temperature control.
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*/
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enum {
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NX_TEMP_NORMAL = 0x1, /* Normal operating range */
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NX_TEMP_WARN, /* Sound alert, temperature getting high */
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NX_TEMP_PANIC /* Fatal error, hardware has shut down. */
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};
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#endif /* __NIC_PHAN_REG_H_ */
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