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-----BEGIN PGP SIGNATURE----- iQJIBAABCgAyFiEEgMe7l+5h9hnxdsnuWYigwDrT+vwFAmGFXBkUHGJoZWxnYWFz QGdvb2dsZS5jb20ACgkQWYigwDrT+vx6Tg/7BsGWm8f+uw/mr9lLm47q2mc4XyoO 7bR9KDp5NM84W/8ZOU7dqqqsnY0ddrSOLBRyhJJYMW3SwJd1y1ajTBsL1Ujqv+eN z+JUFmhq4Laqm4k6Spc9CEJE+Ol5P6gGUtxLYo6PM2R0VxnSs/rDxctT5i7YOpCi COJ+NVT/mc/by2loz1kLTSR9GgtBBgd+Y8UA33GFbHKssROw02L0OI3wffp81Oba EhMGPoD+0FndAniDw+vaOSoO+YaBuTfbM92T/O00mND69Fj1PWgmNWZz7gAVgsXb 3RrNENUFxgw6CDt7LZWB8OyT04iXe0R2kJs+PA9gigFCGbypwbd/Nbz5M7e9HUTR ray+1EpZib6+nIksQBL2mX8nmtyHMcLiM57TOEhq0+ECDO640MiRm8t0FIG/1E8v 3ZYd9w20o/NxlFNXHxxpZ3D/osGH5ocyF5c5m1rfB4RGRwztZGL172LWCB0Ezz9r eHB8sWxylxuhrH+hp2BzQjyddg7rbF+RA4AVfcQSxUpyV01hoRocKqknoDATVeLH 664nJIINFxKJFwfuL3E6OhrInNe1LnAhCZsHHqbS+NNQFgvPRznbixBeLkI9dMf5 Yf6vpsWO7ur8lHHbRndZubVu8nxklXTU7B/w+C11sq6k9LLRJSHzanr3Fn9WA80x sznCxwUvbTCu1r0= =nsMh -----END PGP SIGNATURE----- Merge tag 'pci-v5.16-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull pci updates from Bjorn Helgaas: "Enumeration: - Conserve IRQs by setting up portdrv IRQs only when there are users (Jan Kiszka) - Rework and simplify _OSC negotiation for control of PCIe features (Joerg Roedel) - Remove struct pci_dev.driver pointer since it's redundant with the struct device.driver pointer (Uwe Kleine-König) Resource management: - Coalesce contiguous host bridge apertures from _CRS to accommodate BARs that cover more than one aperture (Kai-Heng Feng) Sysfs: - Check CAP_SYS_ADMIN before parsing user input (Krzysztof Wilczyński) - Return -EINVAL consistently from "store" functions (Krzysztof Wilczyński) - Use sysfs_emit() in endpoint "show" functions to avoid buffer overruns (Kunihiko Hayashi) PCIe native device hotplug: - Ignore Link Down/Up caused by resets during error recovery so endpoint drivers can remain bound to the device (Lukas Wunner) Virtualization: - Avoid bus resets on Atheros QCA6174, where they hang the device (Ingmar Klein) - Work around Pericom PI7C9X2G switch packet drop erratum by using store and forward mode instead of cut-through (Nathan Rossi) - Avoid trying to enable AtomicOps on VFs; the PF setting applies to all VFs (Selvin Xavier) MSI: - Document that /sys/bus/pci/devices/.../irq contains the legacy INTx interrupt or the IRQ of the first MSI (not MSI-X) vector (Barry Song) VPD: - Add pci_read_vpd_any() and pci_write_vpd_any() to access anywhere in the possible VPD space; use these to simplify the cxgb3 driver (Heiner Kallweit) Peer-to-peer DMA: - Add (not subtract) the bus offset when calculating DMA address (Wang Lu) ASPM: - Re-enable LTR at Downstream Ports so they don't report Unsupported Requests when reset or hot-added devices send LTR messages (Mingchuang Qiao) Apple PCIe controller driver: - Add driver for Apple M1 PCIe controller (Alyssa Rosenzweig, Marc Zyngier) Cadence PCIe controller driver: - Return success when probe succeeds instead of falling into error path (Li Chen) HiSilicon Kirin PCIe controller driver: - Reorganize PHY logic and add support for external PHY drivers (Mauro Carvalho Chehab) - Support PERST# GPIOs for HiKey970 external PEX 8606 bridge (Mauro Carvalho Chehab) - Add Kirin 970 support (Mauro Carvalho Chehab) - Make driver removable (Mauro Carvalho Chehab) Intel VMD host bridge driver: - If IOMMU supports interrupt remapping, leave VMD MSI-X remapping enabled (Adrian Huang) - Number each controller so we can tell them apart in /proc/interrupts (Chunguang Xu) - Avoid building on UML because VMD depends on x86 bare metal APIs (Johannes Berg) Marvell Aardvark PCIe controller driver: - Define macros for PCI_EXP_DEVCTL_PAYLOAD_* (Pali Rohár) - Set Max Payload Size to 512 bytes per Marvell spec (Pali Rohár) - Downgrade PIO Response Status messages to debug level (Marek Behún) - Preserve CRS SV (Config Request Retry Software Visibility) bit in emulated Root Control register (Pali Rohár) - Fix issue in configuring reference clock (Pali Rohár) - Don't clear status bits for masked interrupts (Pali Rohár) - Don't mask unused interrupts (Pali Rohár) - Avoid code repetition in advk_pcie_rd_conf() (Marek Behún) - Retry config accesses on CRS response (Pali Rohár) - Simplify emulated Root Capabilities initialization (Pali Rohár) - Fix several link training issues (Pali Rohár) - Fix link-up checking via LTSSM (Pali Rohár) - Fix reporting of Data Link Layer Link Active (Pali Rohár) - Fix emulation of W1C bits (Marek Behún) - Fix MSI domain .alloc() method to return zero on success (Marek Behún) - Read entire 16-bit MSI vector in MSI handler, not just low 8 bits (Marek Behún) - Clear Root Port I/O Space, Memory Space, and Bus Master Enable bits at startup; PCI core will set those as necessary (Pali Rohár) - When operating as a Root Port, set class code to "PCI Bridge" instead of the default "Mass Storage Controller" (Pali Rohár) - Add emulation for PCI_BRIDGE_CTL_BUS_RESET since aardvark doesn't implement this per spec (Pali Rohár) - Add emulation of option ROM BAR since aardvark doesn't implement this per spec (Pali Rohár) MediaTek MT7621 PCIe controller driver: - Add MediaTek MT7621 PCIe host controller driver and DT binding (Sergio Paracuellos) Qualcomm PCIe controller driver: - Add SC8180x compatible string (Bjorn Andersson) - Add endpoint controller driver and DT binding (Manivannan Sadhasivam) - Restructure to use of_device_get_match_data() (Prasad Malisetty) - Add SC7280-specific pcie_1_pipe_clk_src handling (Prasad Malisetty) Renesas R-Car PCIe controller driver: - Remove unnecessary includes (Geert Uytterhoeven) Rockchip DesignWare PCIe controller driver: - Add DT binding (Simon Xue) Socionext UniPhier Pro5 controller driver: - Serialize INTx masking/unmasking (Kunihiko Hayashi) Synopsys DesignWare PCIe controller driver: - Run dwc .host_init() method before registering MSI interrupt handler so we can deal with pending interrupts left by bootloader (Bjorn Andersson) - Clean up Kconfig dependencies (Andy Shevchenko) - Export symbols to allow more modular drivers (Luca Ceresoli) TI DRA7xx PCIe controller driver: - Allow host and endpoint drivers to be modules (Luca Ceresoli) - Enable external clock if present (Luca Ceresoli) TI J721E PCIe driver: - Disable PHY when probe fails after initializing it (Christophe JAILLET) MicroSemi Switchtec management driver: - Return error to application when command execution fails because an out-of-band reset has cleared the device BARs, Memory Space Enable, etc (Kelvin Cao) - Fix MRPC error status handling issue (Kelvin Cao) - Mask out other bits when reading of management VEP instance ID (Kelvin Cao) - Return EOPNOTSUPP instead of ENOTSUPP from sysfs show functions (Kelvin Cao) - Add check of event support (Logan Gunthorpe) Miscellaneous: - Remove unused pci_pool wrappers, which have been replaced by dma_pool (Cai Huoqing) - Use 'unsigned int' instead of bare 'unsigned' (Krzysztof Wilczyński) - Use kstrtobool() directly, sans strtobool() wrapper (Krzysztof Wilczyński) - Fix some sscanf(), sprintf() format mismatches (Krzysztof Wilczyński) - Update PCI subsystem information in MAINTAINERS (Krzysztof Wilczyński) - Correct some misspellings (Krzysztof Wilczyński)" * tag 'pci-v5.16-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (137 commits) PCI: Add ACS quirk for Pericom PI7C9X2G switches PCI: apple: Configure RID to SID mapper on device addition iommu/dart: Exclude MSI doorbell from PCIe device IOVA range PCI: apple: Implement MSI support PCI: apple: Add INTx and per-port interrupt support PCI: kirin: Allow removing the driver PCI: kirin: De-init the dwc driver PCI: kirin: Disable clkreq during poweroff sequence PCI: kirin: Move the power-off code to a common routine PCI: kirin: Add power_off support for Kirin 960 PHY PCI: kirin: Allow building it as a module PCI: kirin: Add MODULE_* macros PCI: kirin: Add Kirin 970 compatible PCI: kirin: Support PERST# GPIOs for HiKey970 external PEX 8606 bridge PCI: apple: Set up reference clocks when probing PCI: apple: Add initial hardware bring-up PCI: of: Allow matching of an interrupt-map local to a PCI device of/irq: Allow matching of an interrupt-map local to an interrupt controller irqdomain: Make of_phandle_args_to_fwspec() generally available PCI: Do not enable AtomicOps on VFs ...
630 lines
20 KiB
C
630 lines
20 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* irq_domain - IRQ translation domains
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*
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* Translation infrastructure between hw and linux irq numbers. This is
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* helpful for interrupt controllers to implement mapping between hardware
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* irq numbers and the Linux irq number space.
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*
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* irq_domains also have hooks for translating device tree or other
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* firmware interrupt representations into a hardware irq number that
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* can be mapped back to a Linux irq number without any extra platform
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* support code.
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*
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* Interrupt controller "domain" data structure. This could be defined as a
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* irq domain controller. That is, it handles the mapping between hardware
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* and virtual interrupt numbers for a given interrupt domain. The domain
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* structure is generally created by the PIC code for a given PIC instance
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* (though a domain can cover more than one PIC if they have a flat number
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* model). It's the domain callbacks that are responsible for setting the
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* irq_chip on a given irq_desc after it's been mapped.
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*
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* The host code and data structures use a fwnode_handle pointer to
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* identify the domain. In some cases, and in order to preserve source
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* code compatibility, this fwnode pointer is "upgraded" to a DT
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* device_node. For those firmware infrastructures that do not provide
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* a unique identifier for an interrupt controller, the irq_domain
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* code offers a fwnode allocator.
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*/
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#ifndef _LINUX_IRQDOMAIN_H
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#define _LINUX_IRQDOMAIN_H
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#include <linux/types.h>
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#include <linux/irqhandler.h>
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#include <linux/of.h>
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#include <linux/mutex.h>
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#include <linux/radix-tree.h>
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struct device_node;
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struct fwnode_handle;
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struct irq_domain;
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struct irq_chip;
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struct irq_data;
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struct irq_desc;
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struct cpumask;
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struct seq_file;
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struct irq_affinity_desc;
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#define IRQ_DOMAIN_IRQ_SPEC_PARAMS 16
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/**
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* struct irq_fwspec - generic IRQ specifier structure
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*
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* @fwnode: Pointer to a firmware-specific descriptor
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* @param_count: Number of device-specific parameters
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* @param: Device-specific parameters
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*
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* This structure, directly modeled after of_phandle_args, is used to
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* pass a device-specific description of an interrupt.
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*/
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struct irq_fwspec {
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struct fwnode_handle *fwnode;
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int param_count;
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u32 param[IRQ_DOMAIN_IRQ_SPEC_PARAMS];
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};
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/* Conversion function from of_phandle_args fields to fwspec */
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void of_phandle_args_to_fwspec(struct device_node *np, const u32 *args,
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unsigned int count, struct irq_fwspec *fwspec);
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/*
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* Should several domains have the same device node, but serve
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* different purposes (for example one domain is for PCI/MSI, and the
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* other for wired IRQs), they can be distinguished using a
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* bus-specific token. Most domains are expected to only carry
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* DOMAIN_BUS_ANY.
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*/
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enum irq_domain_bus_token {
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DOMAIN_BUS_ANY = 0,
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DOMAIN_BUS_WIRED,
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DOMAIN_BUS_GENERIC_MSI,
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DOMAIN_BUS_PCI_MSI,
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DOMAIN_BUS_PLATFORM_MSI,
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DOMAIN_BUS_NEXUS,
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DOMAIN_BUS_IPI,
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DOMAIN_BUS_FSL_MC_MSI,
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DOMAIN_BUS_TI_SCI_INTA_MSI,
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DOMAIN_BUS_WAKEUP,
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DOMAIN_BUS_VMD_MSI,
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};
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/**
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* struct irq_domain_ops - Methods for irq_domain objects
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* @match: Match an interrupt controller device node to a host, returns
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* 1 on a match
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* @map: Create or update a mapping between a virtual irq number and a hw
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* irq number. This is called only once for a given mapping.
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* @unmap: Dispose of such a mapping
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* @xlate: Given a device tree node and interrupt specifier, decode
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* the hardware irq number and linux irq type value.
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*
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* Functions below are provided by the driver and called whenever a new mapping
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* is created or an old mapping is disposed. The driver can then proceed to
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* whatever internal data structures management is required. It also needs
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* to setup the irq_desc when returning from map().
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*/
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struct irq_domain_ops {
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int (*match)(struct irq_domain *d, struct device_node *node,
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enum irq_domain_bus_token bus_token);
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int (*select)(struct irq_domain *d, struct irq_fwspec *fwspec,
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enum irq_domain_bus_token bus_token);
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int (*map)(struct irq_domain *d, unsigned int virq, irq_hw_number_t hw);
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void (*unmap)(struct irq_domain *d, unsigned int virq);
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int (*xlate)(struct irq_domain *d, struct device_node *node,
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const u32 *intspec, unsigned int intsize,
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unsigned long *out_hwirq, unsigned int *out_type);
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#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
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/* extended V2 interfaces to support hierarchy irq_domains */
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int (*alloc)(struct irq_domain *d, unsigned int virq,
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unsigned int nr_irqs, void *arg);
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void (*free)(struct irq_domain *d, unsigned int virq,
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unsigned int nr_irqs);
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int (*activate)(struct irq_domain *d, struct irq_data *irqd, bool reserve);
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void (*deactivate)(struct irq_domain *d, struct irq_data *irq_data);
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int (*translate)(struct irq_domain *d, struct irq_fwspec *fwspec,
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unsigned long *out_hwirq, unsigned int *out_type);
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#endif
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#ifdef CONFIG_GENERIC_IRQ_DEBUGFS
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void (*debug_show)(struct seq_file *m, struct irq_domain *d,
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struct irq_data *irqd, int ind);
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#endif
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};
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extern struct irq_domain_ops irq_generic_chip_ops;
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struct irq_domain_chip_generic;
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/**
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* struct irq_domain - Hardware interrupt number translation object
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* @link: Element in global irq_domain list.
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* @name: Name of interrupt domain
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* @ops: pointer to irq_domain methods
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* @host_data: private data pointer for use by owner. Not touched by irq_domain
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* core code.
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* @flags: host per irq_domain flags
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* @mapcount: The number of mapped interrupts
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*
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* Optional elements
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* @fwnode: Pointer to firmware node associated with the irq_domain. Pretty easy
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* to swap it for the of_node via the irq_domain_get_of_node accessor
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* @gc: Pointer to a list of generic chips. There is a helper function for
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* setting up one or more generic chips for interrupt controllers
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* drivers using the generic chip library which uses this pointer.
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* @parent: Pointer to parent irq_domain to support hierarchy irq_domains
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*
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* Revmap data, used internally by irq_domain
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* @revmap_size: Size of the linear map table @revmap[]
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* @revmap_tree: Radix map tree for hwirqs that don't fit in the linear map
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* @revmap_mutex: Lock for the revmap
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* @revmap: Linear table of irq_data pointers
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*/
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struct irq_domain {
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struct list_head link;
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const char *name;
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const struct irq_domain_ops *ops;
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void *host_data;
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unsigned int flags;
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unsigned int mapcount;
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/* Optional data */
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struct fwnode_handle *fwnode;
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enum irq_domain_bus_token bus_token;
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struct irq_domain_chip_generic *gc;
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#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
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struct irq_domain *parent;
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#endif
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/* reverse map data. The linear map gets appended to the irq_domain */
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irq_hw_number_t hwirq_max;
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unsigned int revmap_size;
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struct radix_tree_root revmap_tree;
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struct mutex revmap_mutex;
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struct irq_data __rcu *revmap[];
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};
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/* Irq domain flags */
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enum {
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/* Irq domain is hierarchical */
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IRQ_DOMAIN_FLAG_HIERARCHY = (1 << 0),
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/* Irq domain name was allocated in __irq_domain_add() */
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IRQ_DOMAIN_NAME_ALLOCATED = (1 << 1),
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/* Irq domain is an IPI domain with virq per cpu */
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IRQ_DOMAIN_FLAG_IPI_PER_CPU = (1 << 2),
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/* Irq domain is an IPI domain with single virq */
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IRQ_DOMAIN_FLAG_IPI_SINGLE = (1 << 3),
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/* Irq domain implements MSIs */
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IRQ_DOMAIN_FLAG_MSI = (1 << 4),
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/* Irq domain implements MSI remapping */
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IRQ_DOMAIN_FLAG_MSI_REMAP = (1 << 5),
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/*
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* Quirk to handle MSI implementations which do not provide
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* masking. Currently known to affect x86, but partially
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* handled in core code.
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*/
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IRQ_DOMAIN_MSI_NOMASK_QUIRK = (1 << 6),
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/* Irq domain doesn't translate anything */
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IRQ_DOMAIN_FLAG_NO_MAP = (1 << 7),
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/*
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* Flags starting from IRQ_DOMAIN_FLAG_NONCORE are reserved
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* for implementation specific purposes and ignored by the
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* core code.
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*/
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IRQ_DOMAIN_FLAG_NONCORE = (1 << 16),
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};
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static inline struct device_node *irq_domain_get_of_node(struct irq_domain *d)
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{
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return to_of_node(d->fwnode);
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}
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#ifdef CONFIG_IRQ_DOMAIN
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struct fwnode_handle *__irq_domain_alloc_fwnode(unsigned int type, int id,
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const char *name, phys_addr_t *pa);
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enum {
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IRQCHIP_FWNODE_REAL,
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IRQCHIP_FWNODE_NAMED,
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IRQCHIP_FWNODE_NAMED_ID,
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};
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static inline
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struct fwnode_handle *irq_domain_alloc_named_fwnode(const char *name)
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{
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return __irq_domain_alloc_fwnode(IRQCHIP_FWNODE_NAMED, 0, name, NULL);
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}
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static inline
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struct fwnode_handle *irq_domain_alloc_named_id_fwnode(const char *name, int id)
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{
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return __irq_domain_alloc_fwnode(IRQCHIP_FWNODE_NAMED_ID, id, name,
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NULL);
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}
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static inline struct fwnode_handle *irq_domain_alloc_fwnode(phys_addr_t *pa)
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{
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return __irq_domain_alloc_fwnode(IRQCHIP_FWNODE_REAL, 0, NULL, pa);
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}
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void irq_domain_free_fwnode(struct fwnode_handle *fwnode);
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struct irq_domain *__irq_domain_add(struct fwnode_handle *fwnode, unsigned int size,
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irq_hw_number_t hwirq_max, int direct_max,
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const struct irq_domain_ops *ops,
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void *host_data);
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struct irq_domain *irq_domain_create_simple(struct fwnode_handle *fwnode,
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unsigned int size,
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unsigned int first_irq,
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const struct irq_domain_ops *ops,
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void *host_data);
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struct irq_domain *irq_domain_add_legacy(struct device_node *of_node,
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unsigned int size,
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unsigned int first_irq,
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irq_hw_number_t first_hwirq,
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const struct irq_domain_ops *ops,
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void *host_data);
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struct irq_domain *irq_domain_create_legacy(struct fwnode_handle *fwnode,
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unsigned int size,
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unsigned int first_irq,
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irq_hw_number_t first_hwirq,
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const struct irq_domain_ops *ops,
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void *host_data);
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extern struct irq_domain *irq_find_matching_fwspec(struct irq_fwspec *fwspec,
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enum irq_domain_bus_token bus_token);
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extern bool irq_domain_check_msi_remap(void);
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extern void irq_set_default_host(struct irq_domain *host);
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extern struct irq_domain *irq_get_default_host(void);
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extern int irq_domain_alloc_descs(int virq, unsigned int nr_irqs,
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irq_hw_number_t hwirq, int node,
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const struct irq_affinity_desc *affinity);
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static inline struct fwnode_handle *of_node_to_fwnode(struct device_node *node)
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{
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return node ? &node->fwnode : NULL;
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}
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extern const struct fwnode_operations irqchip_fwnode_ops;
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static inline bool is_fwnode_irqchip(struct fwnode_handle *fwnode)
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{
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return fwnode && fwnode->ops == &irqchip_fwnode_ops;
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}
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extern void irq_domain_update_bus_token(struct irq_domain *domain,
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enum irq_domain_bus_token bus_token);
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static inline
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struct irq_domain *irq_find_matching_fwnode(struct fwnode_handle *fwnode,
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enum irq_domain_bus_token bus_token)
|
|
{
|
|
struct irq_fwspec fwspec = {
|
|
.fwnode = fwnode,
|
|
};
|
|
|
|
return irq_find_matching_fwspec(&fwspec, bus_token);
|
|
}
|
|
|
|
static inline struct irq_domain *irq_find_matching_host(struct device_node *node,
|
|
enum irq_domain_bus_token bus_token)
|
|
{
|
|
return irq_find_matching_fwnode(of_node_to_fwnode(node), bus_token);
|
|
}
|
|
|
|
static inline struct irq_domain *irq_find_host(struct device_node *node)
|
|
{
|
|
struct irq_domain *d;
|
|
|
|
d = irq_find_matching_host(node, DOMAIN_BUS_WIRED);
|
|
if (!d)
|
|
d = irq_find_matching_host(node, DOMAIN_BUS_ANY);
|
|
|
|
return d;
|
|
}
|
|
|
|
static inline struct irq_domain *irq_domain_add_simple(struct device_node *of_node,
|
|
unsigned int size,
|
|
unsigned int first_irq,
|
|
const struct irq_domain_ops *ops,
|
|
void *host_data)
|
|
{
|
|
return irq_domain_create_simple(of_node_to_fwnode(of_node), size, first_irq, ops, host_data);
|
|
}
|
|
|
|
/**
|
|
* irq_domain_add_linear() - Allocate and register a linear revmap irq_domain.
|
|
* @of_node: pointer to interrupt controller's device tree node.
|
|
* @size: Number of interrupts in the domain.
|
|
* @ops: map/unmap domain callbacks
|
|
* @host_data: Controller private data pointer
|
|
*/
|
|
static inline struct irq_domain *irq_domain_add_linear(struct device_node *of_node,
|
|
unsigned int size,
|
|
const struct irq_domain_ops *ops,
|
|
void *host_data)
|
|
{
|
|
return __irq_domain_add(of_node_to_fwnode(of_node), size, size, 0, ops, host_data);
|
|
}
|
|
|
|
#ifdef CONFIG_IRQ_DOMAIN_NOMAP
|
|
static inline struct irq_domain *irq_domain_add_nomap(struct device_node *of_node,
|
|
unsigned int max_irq,
|
|
const struct irq_domain_ops *ops,
|
|
void *host_data)
|
|
{
|
|
return __irq_domain_add(of_node_to_fwnode(of_node), 0, max_irq, max_irq, ops, host_data);
|
|
}
|
|
|
|
extern unsigned int irq_create_direct_mapping(struct irq_domain *host);
|
|
#endif
|
|
|
|
static inline struct irq_domain *irq_domain_add_tree(struct device_node *of_node,
|
|
const struct irq_domain_ops *ops,
|
|
void *host_data)
|
|
{
|
|
return __irq_domain_add(of_node_to_fwnode(of_node), 0, ~0, 0, ops, host_data);
|
|
}
|
|
|
|
static inline struct irq_domain *irq_domain_create_linear(struct fwnode_handle *fwnode,
|
|
unsigned int size,
|
|
const struct irq_domain_ops *ops,
|
|
void *host_data)
|
|
{
|
|
return __irq_domain_add(fwnode, size, size, 0, ops, host_data);
|
|
}
|
|
|
|
static inline struct irq_domain *irq_domain_create_tree(struct fwnode_handle *fwnode,
|
|
const struct irq_domain_ops *ops,
|
|
void *host_data)
|
|
{
|
|
return __irq_domain_add(fwnode, 0, ~0, 0, ops, host_data);
|
|
}
|
|
|
|
extern void irq_domain_remove(struct irq_domain *host);
|
|
|
|
extern int irq_domain_associate(struct irq_domain *domain, unsigned int irq,
|
|
irq_hw_number_t hwirq);
|
|
extern void irq_domain_associate_many(struct irq_domain *domain,
|
|
unsigned int irq_base,
|
|
irq_hw_number_t hwirq_base, int count);
|
|
|
|
extern unsigned int irq_create_mapping_affinity(struct irq_domain *host,
|
|
irq_hw_number_t hwirq,
|
|
const struct irq_affinity_desc *affinity);
|
|
extern unsigned int irq_create_fwspec_mapping(struct irq_fwspec *fwspec);
|
|
extern void irq_dispose_mapping(unsigned int virq);
|
|
|
|
static inline unsigned int irq_create_mapping(struct irq_domain *host,
|
|
irq_hw_number_t hwirq)
|
|
{
|
|
return irq_create_mapping_affinity(host, hwirq, NULL);
|
|
}
|
|
|
|
extern struct irq_desc *__irq_resolve_mapping(struct irq_domain *domain,
|
|
irq_hw_number_t hwirq,
|
|
unsigned int *irq);
|
|
|
|
static inline struct irq_desc *irq_resolve_mapping(struct irq_domain *domain,
|
|
irq_hw_number_t hwirq)
|
|
{
|
|
return __irq_resolve_mapping(domain, hwirq, NULL);
|
|
}
|
|
|
|
/**
|
|
* irq_find_mapping() - Find a linux irq from a hw irq number.
|
|
* @domain: domain owning this hardware interrupt
|
|
* @hwirq: hardware irq number in that domain space
|
|
*/
|
|
static inline unsigned int irq_find_mapping(struct irq_domain *domain,
|
|
irq_hw_number_t hwirq)
|
|
{
|
|
unsigned int irq;
|
|
|
|
if (__irq_resolve_mapping(domain, hwirq, &irq))
|
|
return irq;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static inline unsigned int irq_linear_revmap(struct irq_domain *domain,
|
|
irq_hw_number_t hwirq)
|
|
{
|
|
return irq_find_mapping(domain, hwirq);
|
|
}
|
|
|
|
extern const struct irq_domain_ops irq_domain_simple_ops;
|
|
|
|
/* stock xlate functions */
|
|
int irq_domain_xlate_onecell(struct irq_domain *d, struct device_node *ctrlr,
|
|
const u32 *intspec, unsigned int intsize,
|
|
irq_hw_number_t *out_hwirq, unsigned int *out_type);
|
|
int irq_domain_xlate_twocell(struct irq_domain *d, struct device_node *ctrlr,
|
|
const u32 *intspec, unsigned int intsize,
|
|
irq_hw_number_t *out_hwirq, unsigned int *out_type);
|
|
int irq_domain_xlate_onetwocell(struct irq_domain *d, struct device_node *ctrlr,
|
|
const u32 *intspec, unsigned int intsize,
|
|
irq_hw_number_t *out_hwirq, unsigned int *out_type);
|
|
|
|
int irq_domain_translate_twocell(struct irq_domain *d,
|
|
struct irq_fwspec *fwspec,
|
|
unsigned long *out_hwirq,
|
|
unsigned int *out_type);
|
|
|
|
int irq_domain_translate_onecell(struct irq_domain *d,
|
|
struct irq_fwspec *fwspec,
|
|
unsigned long *out_hwirq,
|
|
unsigned int *out_type);
|
|
|
|
/* IPI functions */
|
|
int irq_reserve_ipi(struct irq_domain *domain, const struct cpumask *dest);
|
|
int irq_destroy_ipi(unsigned int irq, const struct cpumask *dest);
|
|
|
|
/* V2 interfaces to support hierarchy IRQ domains. */
|
|
extern struct irq_data *irq_domain_get_irq_data(struct irq_domain *domain,
|
|
unsigned int virq);
|
|
extern void irq_domain_set_info(struct irq_domain *domain, unsigned int virq,
|
|
irq_hw_number_t hwirq, struct irq_chip *chip,
|
|
void *chip_data, irq_flow_handler_t handler,
|
|
void *handler_data, const char *handler_name);
|
|
extern void irq_domain_reset_irq_data(struct irq_data *irq_data);
|
|
#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
|
|
extern struct irq_domain *irq_domain_create_hierarchy(struct irq_domain *parent,
|
|
unsigned int flags, unsigned int size,
|
|
struct fwnode_handle *fwnode,
|
|
const struct irq_domain_ops *ops, void *host_data);
|
|
|
|
static inline struct irq_domain *irq_domain_add_hierarchy(struct irq_domain *parent,
|
|
unsigned int flags,
|
|
unsigned int size,
|
|
struct device_node *node,
|
|
const struct irq_domain_ops *ops,
|
|
void *host_data)
|
|
{
|
|
return irq_domain_create_hierarchy(parent, flags, size,
|
|
of_node_to_fwnode(node),
|
|
ops, host_data);
|
|
}
|
|
|
|
extern int __irq_domain_alloc_irqs(struct irq_domain *domain, int irq_base,
|
|
unsigned int nr_irqs, int node, void *arg,
|
|
bool realloc,
|
|
const struct irq_affinity_desc *affinity);
|
|
extern void irq_domain_free_irqs(unsigned int virq, unsigned int nr_irqs);
|
|
extern int irq_domain_activate_irq(struct irq_data *irq_data, bool early);
|
|
extern void irq_domain_deactivate_irq(struct irq_data *irq_data);
|
|
|
|
static inline int irq_domain_alloc_irqs(struct irq_domain *domain,
|
|
unsigned int nr_irqs, int node, void *arg)
|
|
{
|
|
return __irq_domain_alloc_irqs(domain, -1, nr_irqs, node, arg, false,
|
|
NULL);
|
|
}
|
|
|
|
extern int irq_domain_alloc_irqs_hierarchy(struct irq_domain *domain,
|
|
unsigned int irq_base,
|
|
unsigned int nr_irqs, void *arg);
|
|
extern int irq_domain_set_hwirq_and_chip(struct irq_domain *domain,
|
|
unsigned int virq,
|
|
irq_hw_number_t hwirq,
|
|
struct irq_chip *chip,
|
|
void *chip_data);
|
|
extern void irq_domain_free_irqs_common(struct irq_domain *domain,
|
|
unsigned int virq,
|
|
unsigned int nr_irqs);
|
|
extern void irq_domain_free_irqs_top(struct irq_domain *domain,
|
|
unsigned int virq, unsigned int nr_irqs);
|
|
|
|
extern int irq_domain_push_irq(struct irq_domain *domain, int virq, void *arg);
|
|
extern int irq_domain_pop_irq(struct irq_domain *domain, int virq);
|
|
|
|
extern int irq_domain_alloc_irqs_parent(struct irq_domain *domain,
|
|
unsigned int irq_base,
|
|
unsigned int nr_irqs, void *arg);
|
|
|
|
extern void irq_domain_free_irqs_parent(struct irq_domain *domain,
|
|
unsigned int irq_base,
|
|
unsigned int nr_irqs);
|
|
|
|
extern int irq_domain_disconnect_hierarchy(struct irq_domain *domain,
|
|
unsigned int virq);
|
|
|
|
static inline bool irq_domain_is_hierarchy(struct irq_domain *domain)
|
|
{
|
|
return domain->flags & IRQ_DOMAIN_FLAG_HIERARCHY;
|
|
}
|
|
|
|
static inline bool irq_domain_is_ipi(struct irq_domain *domain)
|
|
{
|
|
return domain->flags &
|
|
(IRQ_DOMAIN_FLAG_IPI_PER_CPU | IRQ_DOMAIN_FLAG_IPI_SINGLE);
|
|
}
|
|
|
|
static inline bool irq_domain_is_ipi_per_cpu(struct irq_domain *domain)
|
|
{
|
|
return domain->flags & IRQ_DOMAIN_FLAG_IPI_PER_CPU;
|
|
}
|
|
|
|
static inline bool irq_domain_is_ipi_single(struct irq_domain *domain)
|
|
{
|
|
return domain->flags & IRQ_DOMAIN_FLAG_IPI_SINGLE;
|
|
}
|
|
|
|
static inline bool irq_domain_is_msi(struct irq_domain *domain)
|
|
{
|
|
return domain->flags & IRQ_DOMAIN_FLAG_MSI;
|
|
}
|
|
|
|
static inline bool irq_domain_is_msi_remap(struct irq_domain *domain)
|
|
{
|
|
return domain->flags & IRQ_DOMAIN_FLAG_MSI_REMAP;
|
|
}
|
|
|
|
extern bool irq_domain_hierarchical_is_msi_remap(struct irq_domain *domain);
|
|
|
|
#else /* CONFIG_IRQ_DOMAIN_HIERARCHY */
|
|
static inline int irq_domain_alloc_irqs(struct irq_domain *domain,
|
|
unsigned int nr_irqs, int node, void *arg)
|
|
{
|
|
return -1;
|
|
}
|
|
|
|
static inline void irq_domain_free_irqs(unsigned int virq,
|
|
unsigned int nr_irqs) { }
|
|
|
|
static inline bool irq_domain_is_hierarchy(struct irq_domain *domain)
|
|
{
|
|
return false;
|
|
}
|
|
|
|
static inline bool irq_domain_is_ipi(struct irq_domain *domain)
|
|
{
|
|
return false;
|
|
}
|
|
|
|
static inline bool irq_domain_is_ipi_per_cpu(struct irq_domain *domain)
|
|
{
|
|
return false;
|
|
}
|
|
|
|
static inline bool irq_domain_is_ipi_single(struct irq_domain *domain)
|
|
{
|
|
return false;
|
|
}
|
|
|
|
static inline bool irq_domain_is_msi(struct irq_domain *domain)
|
|
{
|
|
return false;
|
|
}
|
|
|
|
static inline bool irq_domain_is_msi_remap(struct irq_domain *domain)
|
|
{
|
|
return false;
|
|
}
|
|
|
|
static inline bool
|
|
irq_domain_hierarchical_is_msi_remap(struct irq_domain *domain)
|
|
{
|
|
return false;
|
|
}
|
|
#endif /* CONFIG_IRQ_DOMAIN_HIERARCHY */
|
|
|
|
#else /* CONFIG_IRQ_DOMAIN */
|
|
static inline void irq_dispose_mapping(unsigned int virq) { }
|
|
static inline struct irq_domain *irq_find_matching_fwnode(
|
|
struct fwnode_handle *fwnode, enum irq_domain_bus_token bus_token)
|
|
{
|
|
return NULL;
|
|
}
|
|
static inline bool irq_domain_check_msi_remap(void)
|
|
{
|
|
return false;
|
|
}
|
|
#endif /* !CONFIG_IRQ_DOMAIN */
|
|
|
|
#endif /* _LINUX_IRQDOMAIN_H */
|