250 lines
6.6 KiB
C
250 lines
6.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Texas Instruments ICSSG Ethernet driver
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*
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* Copyright (C) 2018-2022 Texas Instruments Incorporated - https://www.ti.com/
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*
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*/
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#ifndef __NET_TI_ICSSG_PRUETH_H
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#define __NET_TI_ICSSG_PRUETH_H
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#include <linux/etherdevice.h>
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#include <linux/genalloc.h>
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#include <linux/if_vlan.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/mfd/syscon.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/net_tstamp.h>
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#include <linux/of.h>
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#include <linux/of_irq.h>
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#include <linux/of_mdio.h>
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#include <linux/of_net.h>
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#include <linux/of_platform.h>
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#include <linux/phy.h>
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#include <linux/remoteproc/pruss.h>
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#include <linux/pruss_driver.h>
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#include <linux/ptp_clock_kernel.h>
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#include <linux/remoteproc.h>
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#include <linux/dma-mapping.h>
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#include <linux/dma/ti-cppi5.h>
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#include <linux/dma/k3-udma-glue.h>
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#include <net/devlink.h>
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#include "icssg_config.h"
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#include "icssg_switch_map.h"
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#define PRUETH_MAX_MTU (2000 - ETH_HLEN - ETH_FCS_LEN)
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#define PRUETH_MIN_PKT_SIZE (VLAN_ETH_ZLEN)
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#define PRUETH_MAX_PKT_SIZE (PRUETH_MAX_MTU + ETH_HLEN + ETH_FCS_LEN)
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#define ICSS_SLICE0 0
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#define ICSS_SLICE1 1
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#define ICSS_FW_PRU 0
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#define ICSS_FW_RTU 1
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#define ICSSG_MAX_RFLOWS 8 /* per slice */
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/* Firmware status codes */
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#define ICSS_HS_FW_READY 0x55555555
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#define ICSS_HS_FW_DEAD 0xDEAD0000 /* lower 16 bits contain error code */
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/* Firmware command codes */
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#define ICSS_HS_CMD_BUSY 0x40000000
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#define ICSS_HS_CMD_DONE 0x80000000
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#define ICSS_HS_CMD_CANCEL 0x10000000
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/* Firmware commands */
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#define ICSS_CMD_SPAD 0x20
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#define ICSS_CMD_RXTX 0x10
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#define ICSS_CMD_ADD_FDB 0x1
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#define ICSS_CMD_DEL_FDB 0x2
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#define ICSS_CMD_SET_RUN 0x4
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#define ICSS_CMD_GET_FDB_SLOT 0x5
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#define ICSS_CMD_ENABLE_VLAN 0x5
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#define ICSS_CMD_DISABLE_VLAN 0x6
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#define ICSS_CMD_ADD_FILTER 0x7
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#define ICSS_CMD_ADD_MAC 0x8
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/* In switch mode there are 3 real ports i.e. 3 mac addrs.
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* however Linux sees only the host side port. The other 2 ports
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* are the switch ports.
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* In emac mode there are 2 real ports i.e. 2 mac addrs.
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* Linux sees both the ports.
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*/
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enum prueth_port {
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PRUETH_PORT_HOST = 0, /* host side port */
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PRUETH_PORT_MII0, /* physical port RG/SG MII 0 */
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PRUETH_PORT_MII1, /* physical port RG/SG MII 1 */
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PRUETH_PORT_INVALID, /* Invalid prueth port */
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};
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enum prueth_mac {
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PRUETH_MAC0 = 0,
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PRUETH_MAC1,
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PRUETH_NUM_MACS,
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PRUETH_MAC_INVALID,
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};
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struct prueth_tx_chn {
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struct device *dma_dev;
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struct napi_struct napi_tx;
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struct k3_cppi_desc_pool *desc_pool;
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struct k3_udma_glue_tx_channel *tx_chn;
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struct prueth_emac *emac;
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u32 id;
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u32 descs_num;
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unsigned int irq;
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char name[32];
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};
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struct prueth_rx_chn {
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struct device *dev;
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struct device *dma_dev;
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struct k3_cppi_desc_pool *desc_pool;
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struct k3_udma_glue_rx_channel *rx_chn;
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u32 descs_num;
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unsigned int irq[ICSSG_MAX_RFLOWS]; /* separate irq per flow */
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char name[32];
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};
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/* There are 4 Tx DMA channels, but the highest priority is CH3 (thread 3)
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* and lower three are lower priority channels or threads.
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*/
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#define PRUETH_MAX_TX_QUEUES 4
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/* data for each emac port */
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struct prueth_emac {
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bool fw_running;
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struct prueth *prueth;
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struct net_device *ndev;
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u8 mac_addr[6];
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struct napi_struct napi_rx;
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u32 msg_enable;
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int link;
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int speed;
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int duplex;
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const char *phy_id;
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struct device_node *phy_node;
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phy_interface_t phy_if;
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enum prueth_port port_id;
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/* DMA related */
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struct prueth_tx_chn tx_chns[PRUETH_MAX_TX_QUEUES];
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struct completion tdown_complete;
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atomic_t tdown_cnt;
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struct prueth_rx_chn rx_chns;
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int rx_flow_id_base;
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int tx_ch_num;
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spinlock_t lock; /* serialize access */
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unsigned long state;
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struct completion cmd_complete;
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/* Mutex to serialize access to firmware command interface */
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struct mutex cmd_lock;
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struct work_struct rx_mode_work;
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struct workqueue_struct *cmd_wq;
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struct pruss_mem_region dram;
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};
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/**
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* struct prueth_pdata - PRUeth platform data
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* @fdqring_mode: Free desc queue mode
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* @quirk_10m_link_issue: 10M link detect errata
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*/
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struct prueth_pdata {
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enum k3_ring_mode fdqring_mode;
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u32 quirk_10m_link_issue:1;
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};
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/**
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* struct prueth - PRUeth structure
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* @dev: device
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* @pruss: pruss handle
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* @pru: rproc instances of PRUs
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* @rtu: rproc instances of RTUs
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* @txpru: rproc instances of TX_PRUs
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* @shram: PRUSS shared RAM region
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* @sram_pool: MSMC RAM pool for buffers
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* @msmcram: MSMC RAM region
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* @eth_node: DT node for the port
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* @emac: private EMAC data structure
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* @registered_netdevs: list of registered netdevs
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* @miig_rt: regmap to mii_g_rt block
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* @mii_rt: regmap to mii_rt block
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* @pru_id: ID for each of the PRUs
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* @pdev: pointer to ICSSG platform device
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* @pdata: pointer to platform data for ICSSG driver
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* @icssg_hwcmdseq: seq counter or HWQ messages
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* @emacs_initialized: num of EMACs/ext ports that are up/running
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*/
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struct prueth {
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struct device *dev;
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struct pruss *pruss;
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struct rproc *pru[PRUSS_NUM_PRUS];
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struct rproc *rtu[PRUSS_NUM_PRUS];
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struct rproc *txpru[PRUSS_NUM_PRUS];
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struct pruss_mem_region shram;
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struct gen_pool *sram_pool;
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struct pruss_mem_region msmcram;
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struct device_node *eth_node[PRUETH_NUM_MACS];
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struct prueth_emac *emac[PRUETH_NUM_MACS];
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struct net_device *registered_netdevs[PRUETH_NUM_MACS];
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struct regmap *miig_rt;
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struct regmap *mii_rt;
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enum pruss_pru_id pru_id[PRUSS_NUM_PRUS];
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struct platform_device *pdev;
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struct prueth_pdata pdata;
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u8 icssg_hwcmdseq;
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int emacs_initialized;
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};
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/* get PRUSS SLICE number from prueth_emac */
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static inline int prueth_emac_slice(struct prueth_emac *emac)
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{
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switch (emac->port_id) {
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case PRUETH_PORT_MII0:
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return ICSS_SLICE0;
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case PRUETH_PORT_MII1:
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return ICSS_SLICE1;
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default:
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return -EINVAL;
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}
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}
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/* Classifier helpers */
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void icssg_class_set_mac_addr(struct regmap *miig_rt, int slice, u8 *mac);
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void icssg_class_set_host_mac_addr(struct regmap *miig_rt, const u8 *mac);
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void icssg_class_disable(struct regmap *miig_rt, int slice);
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void icssg_class_default(struct regmap *miig_rt, int slice, bool allmulti);
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void icssg_ft1_set_mac_addr(struct regmap *miig_rt, int slice, u8 *mac_addr);
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/* config helpers */
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void icssg_config_ipg(struct prueth_emac *emac);
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int icssg_config(struct prueth *prueth, struct prueth_emac *emac,
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int slice);
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int emac_set_port_state(struct prueth_emac *emac,
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enum icssg_port_state_cmd state);
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void icssg_config_set_speed(struct prueth_emac *emac);
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/* Buffer queue helpers */
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int icssg_queue_pop(struct prueth *prueth, u8 queue);
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void icssg_queue_push(struct prueth *prueth, int queue, u16 addr);
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u32 icssg_queue_level(struct prueth *prueth, int queue);
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#define prueth_napi_to_tx_chn(pnapi) \
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container_of(pnapi, struct prueth_tx_chn, napi_tx)
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#endif /* __NET_TI_ICSSG_PRUETH_H */
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