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0195c00244
-----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIVAwUAT3NKzROxKuMESys7AQKElw/+JyDxJSlj+g+nymkx8IVVuU8CsEwNLgRk 8KEnRfLhGtkXFLSJYWO6jzGo16F8Uqli1PdMFte/wagSv0285/HZaKlkkBVHdJ/m u40oSjgT013bBh6MQ0Oaf8pFezFUiQB5zPOA9QGaLVGDLXCmgqUgd7exaD5wRIwB ZmyItjZeAVnDfk1R+ZiNYytHAi8A5wSB+eFDCIQYgyulA1Igd1UnRtx+dRKbvc/m rWQ6KWbZHIdvP1ksd8wHHkrlUD2pEeJ8glJLsZUhMm/5oMf/8RmOCvmo8rvE/qwl eDQ1h4cGYlfjobxXZMHqAN9m7Jg2bI946HZjdb7/7oCeO6VW3FwPZ/Ic75p+wp45 HXJTItufERYk6QxShiOKvA+QexnYwY0IT5oRP4DrhdVB/X9cl2MoaZHC+RbYLQy+ /5VNZKi38iK4F9AbFamS7kd0i5QszA/ZzEzKZ6VMuOp3W/fagpn4ZJT1LIA3m4A9 Q0cj24mqeyCfjysu0TMbPtaN+Yjeu1o1OFRvM8XffbZsp5bNzuTDEvviJ2NXw4vK 4qUHulhYSEWcu9YgAZXvEWDEM78FXCkg2v/CrZXH5tyc95kUkMPcgG+QZBB5wElR FaOKpiC/BuNIGEf02IZQ4nfDxE90QwnDeoYeV+FvNj9UEOopJ5z5bMPoTHxm4cCD NypQthI85pc= =G9mT -----END PGP SIGNATURE----- Merge tag 'split-asm_system_h-for-linus-20120328' of git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-asm_system Pull "Disintegrate and delete asm/system.h" from David Howells: "Here are a bunch of patches to disintegrate asm/system.h into a set of separate bits to relieve the problem of circular inclusion dependencies. I've built all the working defconfigs from all the arches that I can and made sure that they don't break. The reason for these patches is that I recently encountered a circular dependency problem that came about when I produced some patches to optimise get_order() by rewriting it to use ilog2(). This uses bitops - and on the SH arch asm/bitops.h drags in asm-generic/get_order.h by a circuituous route involving asm/system.h. The main difficulty seems to be asm/system.h. It holds a number of low level bits with no/few dependencies that are commonly used (eg. memory barriers) and a number of bits with more dependencies that aren't used in many places (eg. switch_to()). These patches break asm/system.h up into the following core pieces: (1) asm/barrier.h Move memory barriers here. This already done for MIPS and Alpha. (2) asm/switch_to.h Move switch_to() and related stuff here. (3) asm/exec.h Move arch_align_stack() here. Other process execution related bits could perhaps go here from asm/processor.h. (4) asm/cmpxchg.h Move xchg() and cmpxchg() here as they're full word atomic ops and frequently used by atomic_xchg() and atomic_cmpxchg(). (5) asm/bug.h Move die() and related bits. (6) asm/auxvec.h Move AT_VECTOR_SIZE_ARCH here. Other arch headers are created as needed on a per-arch basis." Fixed up some conflicts from other header file cleanups and moving code around that has happened in the meantime, so David's testing is somewhat weakened by that. We'll find out anything that got broken and fix it.. * tag 'split-asm_system_h-for-linus-20120328' of git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-asm_system: (38 commits) Delete all instances of asm/system.h Remove all #inclusions of asm/system.h Add #includes needed to permit the removal of asm/system.h Move all declarations of free_initmem() to linux/mm.h Disintegrate asm/system.h for OpenRISC Split arch_align_stack() out from asm-generic/system.h Split the switch_to() wrapper out of asm-generic/system.h Move the asm-generic/system.h xchg() implementation to asm-generic/cmpxchg.h Create asm-generic/barrier.h Make asm-generic/cmpxchg.h #include asm-generic/cmpxchg-local.h Disintegrate asm/system.h for Xtensa Disintegrate asm/system.h for Unicore32 [based on ver #3, changed by gxt] Disintegrate asm/system.h for Tile Disintegrate asm/system.h for Sparc Disintegrate asm/system.h for SH Disintegrate asm/system.h for Score Disintegrate asm/system.h for S390 Disintegrate asm/system.h for PowerPC Disintegrate asm/system.h for PA-RISC Disintegrate asm/system.h for MN10300 ...
306 lines
7.8 KiB
C
306 lines
7.8 KiB
C
/*
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* Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
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* Copyright (C) 2007-2009 PetaLogix
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* Copyright (C) 2006 Atmark Techno, Inc.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/param.h>
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#include <linux/interrupt.h>
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#include <linux/profile.h>
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#include <linux/irq.h>
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#include <linux/delay.h>
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#include <linux/sched.h>
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#include <linux/spinlock.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <linux/clocksource.h>
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#include <linux/clockchips.h>
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#include <linux/io.h>
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#include <linux/bug.h>
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#include <asm/cpuinfo.h>
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#include <asm/setup.h>
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#include <asm/prom.h>
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#include <asm/irq.h>
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#include <linux/cnt32_to_63.h>
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#ifdef CONFIG_SELFMOD_TIMER
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#include <asm/selfmod.h>
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#define TIMER_BASE BARRIER_BASE_ADDR
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#else
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static unsigned int timer_baseaddr;
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#define TIMER_BASE timer_baseaddr
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#endif
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static unsigned int freq_div_hz;
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static unsigned int timer_clock_freq;
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#define TCSR0 (0x00)
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#define TLR0 (0x04)
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#define TCR0 (0x08)
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#define TCSR1 (0x10)
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#define TLR1 (0x14)
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#define TCR1 (0x18)
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#define TCSR_MDT (1<<0)
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#define TCSR_UDT (1<<1)
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#define TCSR_GENT (1<<2)
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#define TCSR_CAPT (1<<3)
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#define TCSR_ARHT (1<<4)
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#define TCSR_LOAD (1<<5)
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#define TCSR_ENIT (1<<6)
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#define TCSR_ENT (1<<7)
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#define TCSR_TINT (1<<8)
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#define TCSR_PWMA (1<<9)
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#define TCSR_ENALL (1<<10)
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static inline void microblaze_timer0_stop(void)
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{
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out_be32(TIMER_BASE + TCSR0, in_be32(TIMER_BASE + TCSR0) & ~TCSR_ENT);
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}
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static inline void microblaze_timer0_start_periodic(unsigned long load_val)
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{
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if (!load_val)
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load_val = 1;
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out_be32(TIMER_BASE + TLR0, load_val); /* loading value to timer reg */
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/* load the initial value */
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out_be32(TIMER_BASE + TCSR0, TCSR_LOAD);
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/* see timer data sheet for detail
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* !ENALL - don't enable 'em all
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* !PWMA - disable pwm
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* TINT - clear interrupt status
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* ENT- enable timer itself
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* ENIT - enable interrupt
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* !LOAD - clear the bit to let go
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* ARHT - auto reload
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* !CAPT - no external trigger
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* !GENT - no external signal
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* UDT - set the timer as down counter
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* !MDT0 - generate mode
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*/
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out_be32(TIMER_BASE + TCSR0,
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TCSR_TINT|TCSR_ENIT|TCSR_ENT|TCSR_ARHT|TCSR_UDT);
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}
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static inline void microblaze_timer0_start_oneshot(unsigned long load_val)
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{
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if (!load_val)
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load_val = 1;
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out_be32(TIMER_BASE + TLR0, load_val); /* loading value to timer reg */
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/* load the initial value */
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out_be32(TIMER_BASE + TCSR0, TCSR_LOAD);
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out_be32(TIMER_BASE + TCSR0,
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TCSR_TINT|TCSR_ENIT|TCSR_ENT|TCSR_ARHT|TCSR_UDT);
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}
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static int microblaze_timer_set_next_event(unsigned long delta,
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struct clock_event_device *dev)
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{
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pr_debug("%s: next event, delta %x\n", __func__, (u32)delta);
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microblaze_timer0_start_oneshot(delta);
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return 0;
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}
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static void microblaze_timer_set_mode(enum clock_event_mode mode,
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struct clock_event_device *evt)
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{
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switch (mode) {
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case CLOCK_EVT_MODE_PERIODIC:
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printk(KERN_INFO "%s: periodic\n", __func__);
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microblaze_timer0_start_periodic(freq_div_hz);
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break;
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case CLOCK_EVT_MODE_ONESHOT:
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printk(KERN_INFO "%s: oneshot\n", __func__);
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break;
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case CLOCK_EVT_MODE_UNUSED:
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printk(KERN_INFO "%s: unused\n", __func__);
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break;
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case CLOCK_EVT_MODE_SHUTDOWN:
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printk(KERN_INFO "%s: shutdown\n", __func__);
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microblaze_timer0_stop();
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break;
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case CLOCK_EVT_MODE_RESUME:
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printk(KERN_INFO "%s: resume\n", __func__);
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break;
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}
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}
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static struct clock_event_device clockevent_microblaze_timer = {
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.name = "microblaze_clockevent",
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.features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC,
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.shift = 8,
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.rating = 300,
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.set_next_event = microblaze_timer_set_next_event,
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.set_mode = microblaze_timer_set_mode,
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};
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static inline void timer_ack(void)
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{
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out_be32(TIMER_BASE + TCSR0, in_be32(TIMER_BASE + TCSR0));
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}
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static irqreturn_t timer_interrupt(int irq, void *dev_id)
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{
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struct clock_event_device *evt = &clockevent_microblaze_timer;
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#ifdef CONFIG_HEART_BEAT
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heartbeat();
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#endif
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timer_ack();
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evt->event_handler(evt);
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return IRQ_HANDLED;
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}
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static struct irqaction timer_irqaction = {
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.handler = timer_interrupt,
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.flags = IRQF_DISABLED | IRQF_TIMER,
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.name = "timer",
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.dev_id = &clockevent_microblaze_timer,
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};
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static __init void microblaze_clockevent_init(void)
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{
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clockevent_microblaze_timer.mult =
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div_sc(timer_clock_freq, NSEC_PER_SEC,
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clockevent_microblaze_timer.shift);
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clockevent_microblaze_timer.max_delta_ns =
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clockevent_delta2ns((u32)~0, &clockevent_microblaze_timer);
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clockevent_microblaze_timer.min_delta_ns =
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clockevent_delta2ns(1, &clockevent_microblaze_timer);
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clockevent_microblaze_timer.cpumask = cpumask_of(0);
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clockevents_register_device(&clockevent_microblaze_timer);
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}
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static cycle_t microblaze_read(struct clocksource *cs)
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{
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/* reading actual value of timer 1 */
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return (cycle_t) (in_be32(TIMER_BASE + TCR1));
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}
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static struct timecounter microblaze_tc = {
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.cc = NULL,
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};
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static cycle_t microblaze_cc_read(const struct cyclecounter *cc)
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{
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return microblaze_read(NULL);
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}
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static struct cyclecounter microblaze_cc = {
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.read = microblaze_cc_read,
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.mask = CLOCKSOURCE_MASK(32),
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.shift = 8,
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};
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static int __init init_microblaze_timecounter(void)
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{
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microblaze_cc.mult = div_sc(timer_clock_freq, NSEC_PER_SEC,
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microblaze_cc.shift);
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timecounter_init(µblaze_tc, µblaze_cc, sched_clock());
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return 0;
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}
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static struct clocksource clocksource_microblaze = {
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.name = "microblaze_clocksource",
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.rating = 300,
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.read = microblaze_read,
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.mask = CLOCKSOURCE_MASK(32),
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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static int __init microblaze_clocksource_init(void)
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{
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if (clocksource_register_hz(&clocksource_microblaze, timer_clock_freq))
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panic("failed to register clocksource");
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/* stop timer1 */
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out_be32(TIMER_BASE + TCSR1, in_be32(TIMER_BASE + TCSR1) & ~TCSR_ENT);
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/* start timer1 - up counting without interrupt */
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out_be32(TIMER_BASE + TCSR1, TCSR_TINT|TCSR_ENT|TCSR_ARHT);
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/* register timecounter - for ftrace support */
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init_microblaze_timecounter();
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return 0;
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}
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/*
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* We have to protect accesses before timer initialization
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* and return 0 for sched_clock function below.
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*/
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static int timer_initialized;
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void __init time_init(void)
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{
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u32 irq;
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u32 timer_num = 1;
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struct device_node *timer = NULL;
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const void *prop;
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#ifdef CONFIG_SELFMOD_TIMER
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unsigned int timer_baseaddr = 0;
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int arr_func[] = {
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(int)µblaze_read,
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(int)&timer_interrupt,
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(int)µblaze_clocksource_init,
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(int)µblaze_timer_set_mode,
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(int)µblaze_timer_set_next_event,
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0
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};
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#endif
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timer = of_find_compatible_node(NULL, NULL, "xlnx,xps-timer-1.00.a");
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BUG_ON(!timer);
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timer_baseaddr = be32_to_cpup(of_get_property(timer, "reg", NULL));
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timer_baseaddr = (unsigned long) ioremap(timer_baseaddr, PAGE_SIZE);
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irq = irq_of_parse_and_map(timer, 0);
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timer_num = be32_to_cpup(of_get_property(timer,
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"xlnx,one-timer-only", NULL));
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if (timer_num) {
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printk(KERN_EMERG "Please enable two timers in HW\n");
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BUG();
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}
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#ifdef CONFIG_SELFMOD_TIMER
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selfmod_function((int *) arr_func, timer_baseaddr);
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#endif
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printk(KERN_INFO "%s #0 at 0x%08x, irq=%d\n",
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timer->name, timer_baseaddr, irq);
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/* If there is clock-frequency property than use it */
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prop = of_get_property(timer, "clock-frequency", NULL);
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if (prop)
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timer_clock_freq = be32_to_cpup(prop);
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else
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timer_clock_freq = cpuinfo.cpu_clock_freq;
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freq_div_hz = timer_clock_freq / HZ;
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setup_irq(irq, &timer_irqaction);
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#ifdef CONFIG_HEART_BEAT
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setup_heartbeat();
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#endif
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microblaze_clocksource_init();
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microblaze_clockevent_init();
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timer_initialized = 1;
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}
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unsigned long long notrace sched_clock(void)
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{
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if (timer_initialized) {
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struct clocksource *cs = &clocksource_microblaze;
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cycle_t cyc = cnt32_to_63(cs->read(NULL)) & LLONG_MAX;
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return clocksource_cyc2ns(cyc, cs->mult, cs->shift);
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}
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return 0;
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}
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