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Both ACPI and DT provide the ability to describe additional layers of topology between that of individual cores and higher level constructs such as the level at which the last level cache is shared. In ACPI this can be represented in PPTT as a Processor Hierarchy Node Structure [1] that is the parent of the CPU cores and in turn has a parent Processor Hierarchy Nodes Structure representing a higher level of topology. For example Kunpeng 920 has 6 or 8 clusters in each NUMA node, and each cluster has 4 cpus. All clusters share L3 cache data, but each cluster has local L3 tag. On the other hand, each clusters will share some internal system bus. +-----------------------------------+ +---------+ | +------+ +------+ +--------------------------+ | | | CPU0 | | cpu1 | | +-----------+ | | | +------+ +------+ | | | | | | +----+ L3 | | | | +------+ +------+ cluster | | tag | | | | | CPU2 | | CPU3 | | | | | | | +------+ +------+ | +-----------+ | | | | | | +-----------------------------------+ | | +-----------------------------------+ | | | +------+ +------+ +--------------------------+ | | | | | | | +-----------+ | | | +------+ +------+ | | | | | | | | L3 | | | | +------+ +------+ +----+ tag | | | | | | | | | | | | | | +------+ +------+ | +-----------+ | | | | | | +-----------------------------------+ | L3 | | data | +-----------------------------------+ | | | +------+ +------+ | +-----------+ | | | | | | | | | | | | | +------+ +------+ +----+ L3 | | | | | | tag | | | | +------+ +------+ | | | | | | | | | | | +-----------+ | | | +------+ +------+ +--------------------------+ | +-----------------------------------| | | +-----------------------------------| | | | +------+ +------+ +--------------------------+ | | | | | | | +-----------+ | | | +------+ +------+ | | | | | | +----+ L3 | | | | +------+ +------+ | | tag | | | | | | | | | | | | | | +------+ +------+ | +-----------+ | | | | | | +-----------------------------------+ | | +-----------------------------------+ | | | +------+ +------+ +--------------------------+ | | | | | | | +-----------+ | | | +------+ +------+ | | | | | | | | L3 | | | | +------+ +------+ +---+ tag | | | | | | | | | | | | | | +------+ +------+ | +-----------+ | | | | | | +-----------------------------------+ | | +-----------------------------------+ | | | +------+ +------+ +--------------------------+ | | | | | | | +-----------+ | | | +------+ +------+ | | | | | | | | L3 | | | | +------+ +------+ +--+ tag | | | | | | | | | | | | | | +------+ +------+ | +-----------+ | | | | +---------+ +-----------------------------------+ That means spreading tasks among clusters will bring more bandwidth while packing tasks within one cluster will lead to smaller cache synchronization latency. So both kernel and userspace will have a chance to leverage this topology to deploy tasks accordingly to achieve either smaller cache latency within one cluster or an even distribution of load among clusters for higher throughput. This patch exposes cluster topology to both kernel and userspace. Libraried like hwloc will know cluster by cluster_cpus and related sysfs attributes. PoC of HWLOC support at [2]. Note this patch only handle the ACPI case. Special consideration is needed for SMT processors, where it is necessary to move 2 levels up the hierarchy from the leaf nodes (thus skipping the processor core level). Note that arm64 / ACPI does not provide any means of identifying a die level in the topology but that may be unrelate to the cluster level. [1] ACPI Specification 6.3 - section 5.2.29.1 processor hierarchy node structure (Type 0) [2] https://github.com/hisilicon/hwloc/tree/linux-cluster Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Tian Tao <tiantao6@hisilicon.com> Signed-off-by: Barry Song <song.bao.hua@hisilicon.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/r/20210924085104.44806-2-21cnbao@gmail.com
104 lines
4.1 KiB
ReStructuredText
104 lines
4.1 KiB
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===========================================
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How CPU topology info is exported via sysfs
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===========================================
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CPU topology info is exported via sysfs. Items (attributes) are similar
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to /proc/cpuinfo output of some architectures. They reside in
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/sys/devices/system/cpu/cpuX/topology/. Please refer to the ABI file:
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Documentation/ABI/stable/sysfs-devices-system-cpu.
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Architecture-neutral, drivers/base/topology.c, exports these attributes.
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However, the book and drawer related sysfs files will only be created if
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CONFIG_SCHED_BOOK and CONFIG_SCHED_DRAWER are selected, respectively.
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CONFIG_SCHED_BOOK and CONFIG_SCHED_DRAWER are currently only used on s390,
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where they reflect the cpu and cache hierarchy.
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For an architecture to support this feature, it must define some of
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these macros in include/asm-XXX/topology.h::
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#define topology_physical_package_id(cpu)
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#define topology_die_id(cpu)
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#define topology_cluster_id(cpu)
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#define topology_core_id(cpu)
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#define topology_book_id(cpu)
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#define topology_drawer_id(cpu)
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#define topology_sibling_cpumask(cpu)
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#define topology_core_cpumask(cpu)
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#define topology_cluster_cpumask(cpu)
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#define topology_die_cpumask(cpu)
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#define topology_book_cpumask(cpu)
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#define topology_drawer_cpumask(cpu)
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The type of ``**_id macros`` is int.
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The type of ``**_cpumask macros`` is ``(const) struct cpumask *``. The latter
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correspond with appropriate ``**_siblings`` sysfs attributes (except for
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topology_sibling_cpumask() which corresponds with thread_siblings).
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To be consistent on all architectures, include/linux/topology.h
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provides default definitions for any of the above macros that are
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not defined by include/asm-XXX/topology.h:
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1) topology_physical_package_id: -1
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2) topology_die_id: -1
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3) topology_cluster_id: -1
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4) topology_core_id: 0
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5) topology_sibling_cpumask: just the given CPU
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6) topology_core_cpumask: just the given CPU
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7) topology_cluster_cpumask: just the given CPU
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8) topology_die_cpumask: just the given CPU
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For architectures that don't support books (CONFIG_SCHED_BOOK) there are no
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default definitions for topology_book_id() and topology_book_cpumask().
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For architectures that don't support drawers (CONFIG_SCHED_DRAWER) there are
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no default definitions for topology_drawer_id() and topology_drawer_cpumask().
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Additionally, CPU topology information is provided under
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/sys/devices/system/cpu and includes these files. The internal
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source for the output is in brackets ("[]").
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=========== ==========================================================
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kernel_max: the maximum CPU index allowed by the kernel configuration.
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[NR_CPUS-1]
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offline: CPUs that are not online because they have been
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HOTPLUGGED off or exceed the limit of CPUs allowed by the
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kernel configuration (kernel_max above).
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[~cpu_online_mask + cpus >= NR_CPUS]
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online: CPUs that are online and being scheduled [cpu_online_mask]
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possible: CPUs that have been allocated resources and can be
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brought online if they are present. [cpu_possible_mask]
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present: CPUs that have been identified as being present in the
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system. [cpu_present_mask]
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=========== ==========================================================
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The format for the above output is compatible with cpulist_parse()
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[see <linux/cpumask.h>]. Some examples follow.
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In this example, there are 64 CPUs in the system but cpus 32-63 exceed
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the kernel max which is limited to 0..31 by the NR_CPUS config option
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being 32. Note also that CPUs 2 and 4-31 are not online but could be
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brought online as they are both present and possible::
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kernel_max: 31
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offline: 2,4-31,32-63
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online: 0-1,3
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possible: 0-31
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present: 0-31
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In this example, the NR_CPUS config option is 128, but the kernel was
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started with possible_cpus=144. There are 4 CPUs in the system and cpu2
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was manually taken offline (and is the only CPU that can be brought
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online.)::
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kernel_max: 127
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offline: 2,4-127,128-143
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online: 0-1,3
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possible: 0-127
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present: 0-3
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See Documentation/core-api/cpu_hotplug.rst for the possible_cpus=NUM
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kernel start parameter as well as more information on the various cpumasks.
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