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1462eb381b
In order to allow objtool to make sense of all the various paravirt
functions, it needs to either parse whole pv_ops[] tables, or observe
individual assignments in the form:
bf87: 48 c7 05 00 00 00 00 00 00 00 00 movq $0x0,0x0(%rip)
bf92 <xen_init_spinlocks+0x5f>
bf8a: R_X86_64_PC32 pv_ops+0x268
As is, xen_cpu_ops[] is at offset +0 in pv_ops[] and could thus be
parsed as a 'normal' pv_ops[] table, however xen_irq_ops[] and
xen_mmu_ops[] are not.
Worse, both the latter two are compiled into the individual assignment
for by current GCC, but that's not something one can rely on.
Therefore, convert all three into full pv_ops[] tables. This has the
benefit of not needing to teach objtool about the offsets and
resulting in more conservative code-gen.
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Juergen Gross <jgross@suse.com>
Link: https://lore.kernel.org/r/20210624095149.057262522@infradead.org
113 lines
2.7 KiB
C
113 lines
2.7 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <linux/hardirq.h>
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#include <asm/x86_init.h>
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#include <xen/interface/xen.h>
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#include <xen/interface/sched.h>
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#include <xen/interface/vcpu.h>
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#include <xen/features.h>
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#include <xen/events.h>
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#include <asm/xen/hypercall.h>
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#include <asm/xen/hypervisor.h>
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#include "xen-ops.h"
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/*
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* Force a proper event-channel callback from Xen after clearing the
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* callback mask. We do this in a very simple manner, by making a call
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* down into Xen. The pending flag will be checked by Xen on return.
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*/
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noinstr void xen_force_evtchn_callback(void)
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{
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(void)HYPERVISOR_xen_version(0, NULL);
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}
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asmlinkage __visible noinstr unsigned long xen_save_fl(void)
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{
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struct vcpu_info *vcpu;
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unsigned long flags;
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vcpu = this_cpu_read(xen_vcpu);
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/* flag has opposite sense of mask */
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flags = !vcpu->evtchn_upcall_mask;
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/* convert to IF type flag
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-0 -> 0x00000000
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-1 -> 0xffffffff
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*/
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return (-flags) & X86_EFLAGS_IF;
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}
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__PV_CALLEE_SAVE_REGS_THUNK(xen_save_fl, ".noinstr.text");
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asmlinkage __visible noinstr void xen_irq_disable(void)
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{
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/* There's a one instruction preempt window here. We need to
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make sure we're don't switch CPUs between getting the vcpu
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pointer and updating the mask. */
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preempt_disable();
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this_cpu_read(xen_vcpu)->evtchn_upcall_mask = 1;
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preempt_enable_no_resched();
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}
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__PV_CALLEE_SAVE_REGS_THUNK(xen_irq_disable, ".noinstr.text");
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asmlinkage __visible noinstr void xen_irq_enable(void)
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{
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struct vcpu_info *vcpu;
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/*
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* We may be preempted as soon as vcpu->evtchn_upcall_mask is
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* cleared, so disable preemption to ensure we check for
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* events on the VCPU we are still running on.
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*/
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preempt_disable();
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vcpu = this_cpu_read(xen_vcpu);
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vcpu->evtchn_upcall_mask = 0;
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/* Doesn't matter if we get preempted here, because any
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pending event will get dealt with anyway. */
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barrier(); /* unmask then check (avoid races) */
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if (unlikely(vcpu->evtchn_upcall_pending))
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xen_force_evtchn_callback();
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preempt_enable();
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}
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__PV_CALLEE_SAVE_REGS_THUNK(xen_irq_enable, ".noinstr.text");
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static void xen_safe_halt(void)
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{
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/* Blocking includes an implicit local_irq_enable(). */
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if (HYPERVISOR_sched_op(SCHEDOP_block, NULL) != 0)
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BUG();
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}
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static void xen_halt(void)
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{
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if (irqs_disabled())
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HYPERVISOR_vcpu_op(VCPUOP_down,
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xen_vcpu_nr(smp_processor_id()), NULL);
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else
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xen_safe_halt();
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}
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static const typeof(pv_ops) xen_irq_ops __initconst = {
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.irq = {
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.save_fl = PV_CALLEE_SAVE(xen_save_fl),
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.irq_disable = PV_CALLEE_SAVE(xen_irq_disable),
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.irq_enable = PV_CALLEE_SAVE(xen_irq_enable),
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.safe_halt = xen_safe_halt,
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.halt = xen_halt,
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},
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};
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void __init xen_init_irq_ops(void)
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{
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pv_ops.irq = xen_irq_ops.irq;
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x86_init.irqs.intr_init = xen_init_IRQ;
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}
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