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13047a092c
Don't clear the shared DPHY registers common to MIPI Rx and MIPI Tx during
DSI initialization since this was causing MIPI Rx reset. Rest of the
writes are bitwise, so will not affect Mipi Rx side.
Fixes:
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.. | ||
drm | ||
host1x | ||
ipu-v3 | ||
trace | ||
vga | ||
Makefile |