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c072c4ef7e
Old Exynos SoCs have both Product ID and Revision ID in one single
register, while new SoCs tend to have two separate registers for those
IDs. Implement handling of both cases by passing Revision ID register
offsets in driver data.
Previously existing macros for Exynos4210 (removed in this patch) were
incorrect:
#define EXYNOS_SUBREV_MASK (0xf << 4)
#define EXYNOS_MAINREV_MASK (0xf << 0)
Actual format of PRO_ID register in Exynos4210 (offset 0x0):
[31:12] Product ID
[9:8] Package information
[7:4] Main Revision Number
[3:0] Sub Revision Number
This patch doesn't change the behavior on existing platforms, so
'/sys/devices/soc0/revision' will show the same string as before.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Tested-by: Henrik Grimler <henrik@grimler.se>
Link: https://lore.kernel.org/r/20211014133508.1210-1-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
50 lines
1.5 KiB
C
50 lines
1.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2018 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*
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* Exynos - CHIPID support
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*/
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#ifndef __LINUX_SOC_EXYNOS_CHIPID_H
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#define __LINUX_SOC_EXYNOS_CHIPID_H
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#define EXYNOS_CHIPID_REG_PRO_ID 0x00
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#define EXYNOS_REV_PART_MASK 0xf
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#define EXYNOS_REV_PART_SHIFT 4
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#define EXYNOS_MASK 0xfffff000
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#define EXYNOS_CHIPID_REG_PKG_ID 0x04
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/* Bit field definitions for EXYNOS_CHIPID_REG_PKG_ID register */
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#define EXYNOS5422_IDS_OFFSET 24
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#define EXYNOS5422_IDS_MASK 0xff
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#define EXYNOS5422_USESG_OFFSET 3
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#define EXYNOS5422_USESG_MASK 0x01
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#define EXYNOS5422_SG_OFFSET 0
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#define EXYNOS5422_SG_MASK 0x07
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#define EXYNOS5422_TABLE_OFFSET 8
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#define EXYNOS5422_TABLE_MASK 0x03
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#define EXYNOS5422_SG_A_OFFSET 17
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#define EXYNOS5422_SG_A_MASK 0x0f
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#define EXYNOS5422_SG_B_OFFSET 21
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#define EXYNOS5422_SG_B_MASK 0x03
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#define EXYNOS5422_SG_BSIGN_OFFSET 23
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#define EXYNOS5422_SG_BSIGN_MASK 0x01
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#define EXYNOS5422_BIN2_OFFSET 12
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#define EXYNOS5422_BIN2_MASK 0x01
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#define EXYNOS_CHIPID_REG_LOT_ID 0x14
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#define EXYNOS_CHIPID_REG_AUX_INFO 0x1c
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/* Bit field definitions for EXYNOS_CHIPID_REG_AUX_INFO register */
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#define EXYNOS5422_TMCB_OFFSET 0
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#define EXYNOS5422_TMCB_MASK 0x7f
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#define EXYNOS5422_ARM_UP_OFFSET 8
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#define EXYNOS5422_ARM_UP_MASK 0x03
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#define EXYNOS5422_ARM_DN_OFFSET 10
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#define EXYNOS5422_ARM_DN_MASK 0x03
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#define EXYNOS5422_KFC_UP_OFFSET 12
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#define EXYNOS5422_KFC_UP_MASK 0x03
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#define EXYNOS5422_KFC_DN_OFFSET 14
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#define EXYNOS5422_KFC_DN_MASK 0x03
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#endif /*__LINUX_SOC_EXYNOS_CHIPID_H */
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