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![Kai Stuhlemmer](/assets/img/avatar_default.png)
Adding SAM9X60 SIP variants to the soc description list. Signed-off-by: Kai Stuhlemmer <kai.stuhlemmer@ebee.de> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20201008125028.21071-1-nicolas.ferre@microchip.com
131 lines
4.1 KiB
C
131 lines
4.1 KiB
C
/*
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* Copyright (C) 2015 Atmel
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*
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* Boris Brezillon <boris.brezillon@free-electrons.com
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*
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*/
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#ifndef __AT91_SOC_H
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#define __AT91_SOC_H
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#include <linux/sys_soc.h>
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struct at91_soc {
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u32 cidr_match;
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u32 exid_match;
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const char *name;
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const char *family;
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};
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#define AT91_SOC(__cidr, __exid, __name, __family) \
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{ \
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.cidr_match = (__cidr), \
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.exid_match = (__exid), \
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.name = (__name), \
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.family = (__family), \
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}
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struct soc_device * __init
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at91_soc_init(const struct at91_soc *socs);
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#define AT91RM9200_CIDR_MATCH 0x09290780
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#define AT91SAM9260_CIDR_MATCH 0x019803a0
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#define AT91SAM9261_CIDR_MATCH 0x019703a0
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#define AT91SAM9263_CIDR_MATCH 0x019607a0
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#define AT91SAM9G20_CIDR_MATCH 0x019905a0
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#define AT91SAM9RL64_CIDR_MATCH 0x019b03a0
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#define AT91SAM9G45_CIDR_MATCH 0x019b05a0
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#define AT91SAM9X5_CIDR_MATCH 0x019a05a0
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#define AT91SAM9N12_CIDR_MATCH 0x019a07a0
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#define SAM9X60_CIDR_MATCH 0x019b35a0
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#define AT91SAM9M11_EXID_MATCH 0x00000001
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#define AT91SAM9M10_EXID_MATCH 0x00000002
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#define AT91SAM9G46_EXID_MATCH 0x00000003
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#define AT91SAM9G45_EXID_MATCH 0x00000004
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#define AT91SAM9G15_EXID_MATCH 0x00000000
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#define AT91SAM9G35_EXID_MATCH 0x00000001
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#define AT91SAM9X35_EXID_MATCH 0x00000002
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#define AT91SAM9G25_EXID_MATCH 0x00000003
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#define AT91SAM9X25_EXID_MATCH 0x00000004
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#define AT91SAM9CN12_EXID_MATCH 0x00000005
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#define AT91SAM9N12_EXID_MATCH 0x00000006
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#define AT91SAM9CN11_EXID_MATCH 0x00000009
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#define SAM9X60_EXID_MATCH 0x00000000
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#define SAM9X60_D5M_EXID_MATCH 0x00000001
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#define SAM9X60_D1G_EXID_MATCH 0x00000010
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#define SAM9X60_D6K_EXID_MATCH 0x00000011
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#define AT91SAM9XE128_CIDR_MATCH 0x329973a0
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#define AT91SAM9XE256_CIDR_MATCH 0x329a93a0
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#define AT91SAM9XE512_CIDR_MATCH 0x329aa3a0
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#define SAMA5D2_CIDR_MATCH 0x0a5c08c0
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#define SAMA5D21CU_EXID_MATCH 0x0000005a
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#define SAMA5D225C_D1M_EXID_MATCH 0x00000053
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#define SAMA5D22CU_EXID_MATCH 0x00000059
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#define SAMA5D22CN_EXID_MATCH 0x00000069
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#define SAMA5D23CU_EXID_MATCH 0x00000058
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#define SAMA5D24CX_EXID_MATCH 0x00000004
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#define SAMA5D24CU_EXID_MATCH 0x00000014
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#define SAMA5D26CU_EXID_MATCH 0x00000012
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#define SAMA5D27C_D1G_EXID_MATCH 0x00000033
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#define SAMA5D27C_D5M_EXID_MATCH 0x00000032
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#define SAMA5D27C_LD1G_EXID_MATCH 0x00000061
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#define SAMA5D27C_LD2G_EXID_MATCH 0x00000062
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#define SAMA5D27CU_EXID_MATCH 0x00000011
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#define SAMA5D27CN_EXID_MATCH 0x00000021
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#define SAMA5D28C_D1G_EXID_MATCH 0x00000013
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#define SAMA5D28C_LD1G_EXID_MATCH 0x00000071
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#define SAMA5D28C_LD2G_EXID_MATCH 0x00000072
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#define SAMA5D28CU_EXID_MATCH 0x00000010
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#define SAMA5D28CN_EXID_MATCH 0x00000020
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#define SAMA5D3_CIDR_MATCH 0x0a5c07c0
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#define SAMA5D31_EXID_MATCH 0x00444300
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#define SAMA5D33_EXID_MATCH 0x00414300
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#define SAMA5D34_EXID_MATCH 0x00414301
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#define SAMA5D35_EXID_MATCH 0x00584300
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#define SAMA5D36_EXID_MATCH 0x00004301
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#define SAMA5D4_CIDR_MATCH 0x0a5c07c0
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#define SAMA5D41_EXID_MATCH 0x00000001
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#define SAMA5D42_EXID_MATCH 0x00000002
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#define SAMA5D43_EXID_MATCH 0x00000003
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#define SAMA5D44_EXID_MATCH 0x00000004
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#define SAME70Q21_CIDR_MATCH 0x21020e00
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#define SAME70Q21_EXID_MATCH 0x00000002
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#define SAME70Q20_CIDR_MATCH 0x21020c00
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#define SAME70Q20_EXID_MATCH 0x00000002
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#define SAME70Q19_CIDR_MATCH 0x210d0a00
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#define SAME70Q19_EXID_MATCH 0x00000002
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#define SAMS70Q21_CIDR_MATCH 0x21120e00
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#define SAMS70Q21_EXID_MATCH 0x00000002
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#define SAMS70Q20_CIDR_MATCH 0x21120c00
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#define SAMS70Q20_EXID_MATCH 0x00000002
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#define SAMS70Q19_CIDR_MATCH 0x211d0a00
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#define SAMS70Q19_EXID_MATCH 0x00000002
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#define SAMV71Q21_CIDR_MATCH 0x21220e00
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#define SAMV71Q21_EXID_MATCH 0x00000002
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#define SAMV71Q20_CIDR_MATCH 0x21220c00
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#define SAMV71Q20_EXID_MATCH 0x00000002
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#define SAMV71Q19_CIDR_MATCH 0x212d0a00
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#define SAMV71Q19_EXID_MATCH 0x00000002
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#define SAMV70Q20_CIDR_MATCH 0x21320c00
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#define SAMV70Q20_EXID_MATCH 0x00000002
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#define SAMV70Q19_CIDR_MATCH 0x213d0a00
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#define SAMV70Q19_EXID_MATCH 0x00000002
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#endif /* __AT91_SOC_H */
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