mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-24 01:41:39 +00:00
![Linus Torvalds](/assets/img/avatar_default.png)
Introduce an initial driver for CXL 2.0 Type-3 Memory Devices. CXL is Compute Express Link which released the 2.0 specification in November. The Linux relevant changes in CXL 2.0 are support for an OS to dynamically assign address space to memory devices, support for switches, persistent memory, and hotplug. A Type-3 Memory Device is a PCI enumerated device presenting the CXL Memory Device Class Code and implementing the CXL.mem protocol. CXL.mem allows device to advertise CPU and I/O coherent memory to the system, i.e. typical "System RAM" and "Persistent Memory" in Linux /proc/iomem terms. In addition to the CXL.mem fast path there is an administrative command hardware mailbox interface for maintenance and provisioning. It is this command interface that is the focus of the initial driver. With this driver a CXL device that is mapped by the BIOS can be administered by Linux. Linux support for CXL PMEM and dynamic CXL address space management are to be implemented post v5.12.4cdadfd5e0
cxl/mem: Introduce a driver for CXL-2.0-Type-3 endpoints Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>8adaf747c9
cxl/mem: Find device capabilities Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>b39cb1052a
cxl/mem: Register CXL memX devices Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>13237183c7
cxl/mem: Add a "RAW" send command Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>472b1ce6e9
cxl/mem: Enable commands via CEL Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>57ee605b97
cxl/mem: Add set of informational commands Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEf41QbsdZzFdA8EfZHtKRamZ9iAIFAmA1xV0ACgkQHtKRamZ9 iALEMQ/8Ce45LCh0oWh8FsSZ50i1KRwKGwpYNCiutTYLBArpBZXJdE1ZRFFCKgi9 ahMs29KSsj/60vG/DYuOwZBKClUiqOQHmtCRUQbb5wGxb7q8f2AKQSPOJ+Nn0nJE kgstMnkqe/neAlNDeMRdZcoBku2++hWjVVnz8QqE5Py3v3T+uEU5Au3fIhnCyvk5 usXcH8Y6R7Lb3BxT4z3DKumaRfoxIsQlH5XFbnUbgwlkE7KHoyAagZluJqh3cZpo sZrCpwG5Onw8rKqfLl//CZ8FfBjE2XfSqJkEPCCMfZUhI78sGGdmHL3ElM9/MNIB neGs3dQ5lkTaiw0nCqFtZMvDZEUsIgXPLiBByG22TM3/aIMmLqbJzeYG6UHENwC+ hLZDV/WJNLRfeUVppt+6PgcOgjTUjNV45SdVryf10Kh3NPZh7m6OPeqG/QTKHMv9 EgbFGihZF3NcSwvf5mdQNIMlnEL0WxOl/I+bSszYPXP6l38btegHR75gUXu7UGwl 9LQhkVEQL8UmfRKX2HaG6h8hyTUOf1kQiXgvchLxYLKHXSc0J/wAwCa0w3jw1m5r bdcVQx3JcBv2S1tUHp+wMqHDbLSGpeE5nF3emWabttsjSUmlb1LuAQxgrdyBtQi9 o5v6dDLOTmAH4sAt96HWKDzpUIMix3YmO3YSghYtNrwWUylQLuA= =3SAQ -----END PGP SIGNATURE----- Merge tag 'cxl-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/nvdimm/nvdimm Pull initial support for CXL (Compute Express Link) from Dan Williams: "Introduce an initial driver for CXL 2.0 Type-3 Memory Devices. CXL is Compute Express Link which released the 2.0 specification in November. The Linux relevant changes in CXL 2.0 are support for an OS to dynamically assign address space to memory devices, support for switches, persistent memory, and hotplug. A Type-3 Memory Device is a PCI enumerated device presenting the CXL Memory Device Class Code and implementing the CXL.mem protocol. CXL.mem allows device to advertise CPU and I/O coherent memory to the system, i.e. typical "System RAM" and "Persistent Memory" in Linux /proc/iomem terms. In addition to the CXL.mem fast path there is an administrative command hardware mailbox interface for maintenance and provisioning. It is this command interface that is the focus of the initial driver. With this driver a CXL device that is mapped by the BIOS can be administered by Linux. Linux support for CXL PMEM and dynamic CXL address space management are to be implemented post v5.12" Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>4cdadfd5e0
("cxl/mem: Introduce a driver for CXL-2.0-Type-3 endpoints")13237183c7
("cxl/mem: Add a "RAW" send command")472b1ce6e9
("cxl/mem: Enable commands via CEL")57ee605b97
("cxl/mem: Add set of informational commands") Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>8adaf747c9
("cxl/mem: Find device capabilities")b39cb1052a
("cxl/mem: Register CXL memX devices") * tag 'cxl-for-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/nvdimm/nvdimm: cxl/mem: Fix potential memory leak cxl/mem: Return -EFAULT if copy_to_user() fails MAINTAINERS: Add maintainers of the CXL driver cxl/mem: Add set of informational commands cxl/mem: Enable commands via CEL cxl/mem: Add a "RAW" send command cxl/mem: Add basic IOCTL interface cxl/mem: Register CXL memX devices cxl/mem: Find device capabilities cxl/mem: Introduce a driver for CXL-2.0-Type-3 endpoints
552 lines
16 KiB
YAML
552 lines
16 KiB
YAML
# SPDX-License-Identifier: GPL-2.0
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#
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# clang-format configuration file. Intended for clang-format >= 4.
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#
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# For more information, see:
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#
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# Documentation/process/clang-format.rst
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# https://clang.llvm.org/docs/ClangFormat.html
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# https://clang.llvm.org/docs/ClangFormatStyleOptions.html
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#
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---
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AccessModifierOffset: -4
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AlignAfterOpenBracket: Align
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AlignConsecutiveAssignments: false
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AlignConsecutiveDeclarations: false
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#AlignEscapedNewlines: Left # Unknown to clang-format-4.0
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AlignOperands: true
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AlignTrailingComments: false
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AllowAllParametersOfDeclarationOnNextLine: false
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AllowShortBlocksOnASingleLine: false
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AllowShortCaseLabelsOnASingleLine: false
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AllowShortFunctionsOnASingleLine: None
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AllowShortIfStatementsOnASingleLine: false
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AllowShortLoopsOnASingleLine: false
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AlwaysBreakAfterDefinitionReturnType: None
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AlwaysBreakAfterReturnType: None
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AlwaysBreakBeforeMultilineStrings: false
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AlwaysBreakTemplateDeclarations: false
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BinPackArguments: true
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BinPackParameters: true
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BraceWrapping:
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AfterClass: false
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AfterControlStatement: false
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AfterEnum: false
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AfterFunction: true
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AfterNamespace: true
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AfterObjCDeclaration: false
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AfterStruct: false
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AfterUnion: false
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#AfterExternBlock: false # Unknown to clang-format-5.0
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BeforeCatch: false
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BeforeElse: false
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IndentBraces: false
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#SplitEmptyFunction: true # Unknown to clang-format-4.0
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#SplitEmptyRecord: true # Unknown to clang-format-4.0
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#SplitEmptyNamespace: true # Unknown to clang-format-4.0
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BreakBeforeBinaryOperators: None
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BreakBeforeBraces: Custom
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#BreakBeforeInheritanceComma: false # Unknown to clang-format-4.0
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BreakBeforeTernaryOperators: false
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BreakConstructorInitializersBeforeComma: false
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#BreakConstructorInitializers: BeforeComma # Unknown to clang-format-4.0
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BreakAfterJavaFieldAnnotations: false
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BreakStringLiterals: false
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ColumnLimit: 80
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CommentPragmas: '^ IWYU pragma:'
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#CompactNamespaces: false # Unknown to clang-format-4.0
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ConstructorInitializerAllOnOneLineOrOnePerLine: false
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ConstructorInitializerIndentWidth: 8
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ContinuationIndentWidth: 8
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Cpp11BracedListStyle: false
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DerivePointerAlignment: false
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DisableFormat: false
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ExperimentalAutoDetectBinPacking: false
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#FixNamespaceComments: false # Unknown to clang-format-4.0
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# Taken from:
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# git grep -h '^#define [^[:space:]]*for_each[^[:space:]]*(' include/ \
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# | sed "s,^#define \([^[:space:]]*for_each[^[:space:]]*\)(.*$, - '\1'," \
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# | sort | uniq
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ForEachMacros:
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- 'apei_estatus_for_each_section'
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- 'ata_for_each_dev'
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- 'ata_for_each_link'
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- '__ata_qc_for_each'
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- 'ata_qc_for_each'
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- 'ata_qc_for_each_raw'
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- 'ata_qc_for_each_with_internal'
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- 'ax25_for_each'
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- 'ax25_uid_for_each'
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- '__bio_for_each_bvec'
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- 'bio_for_each_bvec'
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- 'bio_for_each_bvec_all'
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- 'bio_for_each_integrity_vec'
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- '__bio_for_each_segment'
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- 'bio_for_each_segment'
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- 'bio_for_each_segment_all'
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- 'bio_list_for_each'
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- 'bip_for_each_vec'
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- 'bitmap_for_each_clear_region'
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- 'bitmap_for_each_set_region'
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- 'blkg_for_each_descendant_post'
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- 'blkg_for_each_descendant_pre'
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- 'blk_queue_for_each_rl'
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- 'bond_for_each_slave'
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- 'bond_for_each_slave_rcu'
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- 'bpf_for_each_spilled_reg'
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- 'btree_for_each_safe128'
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- 'btree_for_each_safe32'
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- 'btree_for_each_safe64'
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- 'btree_for_each_safel'
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- 'card_for_each_dev'
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- 'cgroup_taskset_for_each'
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- 'cgroup_taskset_for_each_leader'
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- 'cpufreq_for_each_entry'
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- 'cpufreq_for_each_entry_idx'
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- 'cpufreq_for_each_valid_entry'
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- 'cpufreq_for_each_valid_entry_idx'
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- 'css_for_each_child'
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- 'css_for_each_descendant_post'
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- 'css_for_each_descendant_pre'
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- 'cxl_for_each_cmd'
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- 'device_for_each_child_node'
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- 'dma_fence_chain_for_each'
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- 'do_for_each_ftrace_op'
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- 'drm_atomic_crtc_for_each_plane'
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- 'drm_atomic_crtc_state_for_each_plane'
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- 'drm_atomic_crtc_state_for_each_plane_state'
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- 'drm_atomic_for_each_plane_damage'
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- 'drm_client_for_each_connector_iter'
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- 'drm_client_for_each_modeset'
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- 'drm_connector_for_each_possible_encoder'
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- 'drm_for_each_bridge_in_chain'
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- 'drm_for_each_connector_iter'
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- 'drm_for_each_crtc'
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- 'drm_for_each_crtc_reverse'
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- 'drm_for_each_encoder'
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- 'drm_for_each_encoder_mask'
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- 'drm_for_each_fb'
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- 'drm_for_each_legacy_plane'
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- 'drm_for_each_plane'
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- 'drm_for_each_plane_mask'
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- 'drm_for_each_privobj'
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- 'drm_mm_for_each_hole'
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- 'drm_mm_for_each_node'
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- 'drm_mm_for_each_node_in_range'
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- 'drm_mm_for_each_node_safe'
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- 'flow_action_for_each'
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- 'for_each_active_dev_scope'
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- 'for_each_active_drhd_unit'
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- 'for_each_active_iommu'
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- 'for_each_aggr_pgid'
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- 'for_each_available_child_of_node'
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- 'for_each_bio'
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- 'for_each_board_func_rsrc'
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- 'for_each_bvec'
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- 'for_each_card_auxs'
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- 'for_each_card_auxs_safe'
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- 'for_each_card_components'
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- 'for_each_card_dapms'
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- 'for_each_card_pre_auxs'
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- 'for_each_card_prelinks'
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- 'for_each_card_rtds'
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- 'for_each_card_rtds_safe'
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- 'for_each_card_widgets'
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- 'for_each_card_widgets_safe'
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- 'for_each_cgroup_storage_type'
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- 'for_each_child_of_node'
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- 'for_each_clear_bit'
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- 'for_each_clear_bit_from'
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- 'for_each_cmsghdr'
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- 'for_each_compatible_node'
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- 'for_each_component_dais'
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- 'for_each_component_dais_safe'
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- 'for_each_comp_order'
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- 'for_each_console'
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- 'for_each_cpu'
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- 'for_each_cpu_and'
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- 'for_each_cpu_not'
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- 'for_each_cpu_wrap'
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- 'for_each_dapm_widgets'
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- 'for_each_dev_addr'
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- 'for_each_dev_scope'
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- 'for_each_displayid_db'
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- 'for_each_dma_cap_mask'
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- 'for_each_dpcm_be'
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- 'for_each_dpcm_be_rollback'
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- 'for_each_dpcm_be_safe'
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- 'for_each_dpcm_fe'
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- 'for_each_drhd_unit'
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- 'for_each_dss_dev'
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- 'for_each_efi_memory_desc'
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- 'for_each_efi_memory_desc_in_map'
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- 'for_each_element'
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- 'for_each_element_extid'
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- 'for_each_element_id'
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- 'for_each_endpoint_of_node'
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- 'for_each_evictable_lru'
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- 'for_each_fib6_node_rt_rcu'
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- 'for_each_fib6_walker_rt'
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- 'for_each_free_mem_pfn_range_in_zone'
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- 'for_each_free_mem_pfn_range_in_zone_from'
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- 'for_each_free_mem_range'
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- 'for_each_free_mem_range_reverse'
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- 'for_each_func_rsrc'
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- 'for_each_hstate'
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- 'for_each_if'
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- 'for_each_iommu'
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- 'for_each_ip_tunnel_rcu'
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- 'for_each_irq_nr'
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- 'for_each_link_codecs'
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- 'for_each_link_cpus'
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- 'for_each_link_platforms'
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- 'for_each_lru'
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- 'for_each_matching_node'
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- 'for_each_matching_node_and_match'
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- 'for_each_member'
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- 'for_each_memcg_cache_index'
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- 'for_each_mem_pfn_range'
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- '__for_each_mem_range'
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- 'for_each_mem_range'
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- '__for_each_mem_range_rev'
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- 'for_each_mem_range_rev'
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- 'for_each_mem_region'
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- 'for_each_migratetype_order'
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- 'for_each_msi_entry'
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- 'for_each_msi_entry_safe'
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- 'for_each_net'
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- 'for_each_net_continue_reverse'
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- 'for_each_netdev'
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- 'for_each_netdev_continue'
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- 'for_each_netdev_continue_rcu'
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- 'for_each_netdev_continue_reverse'
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- 'for_each_netdev_feature'
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- 'for_each_netdev_in_bond_rcu'
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- 'for_each_netdev_rcu'
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- 'for_each_netdev_reverse'
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- 'for_each_netdev_safe'
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- 'for_each_net_rcu'
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- 'for_each_new_connector_in_state'
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- 'for_each_new_crtc_in_state'
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- 'for_each_new_mst_mgr_in_state'
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- 'for_each_new_plane_in_state'
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- 'for_each_new_private_obj_in_state'
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- 'for_each_node'
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- 'for_each_node_by_name'
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- 'for_each_node_by_type'
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- 'for_each_node_mask'
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- 'for_each_node_state'
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- 'for_each_node_with_cpus'
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- 'for_each_node_with_property'
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- 'for_each_nonreserved_multicast_dest_pgid'
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- 'for_each_of_allnodes'
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- 'for_each_of_allnodes_from'
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- 'for_each_of_cpu_node'
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- 'for_each_of_pci_range'
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- 'for_each_old_connector_in_state'
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- 'for_each_old_crtc_in_state'
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- 'for_each_old_mst_mgr_in_state'
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- 'for_each_oldnew_connector_in_state'
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- 'for_each_oldnew_crtc_in_state'
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- 'for_each_oldnew_mst_mgr_in_state'
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- 'for_each_oldnew_plane_in_state'
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- 'for_each_oldnew_plane_in_state_reverse'
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- 'for_each_oldnew_private_obj_in_state'
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- 'for_each_old_plane_in_state'
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- 'for_each_old_private_obj_in_state'
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- 'for_each_online_cpu'
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- 'for_each_online_node'
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- 'for_each_online_pgdat'
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- 'for_each_pci_bridge'
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- 'for_each_pci_dev'
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- 'for_each_pci_msi_entry'
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- 'for_each_pcm_streams'
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- 'for_each_physmem_range'
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- 'for_each_populated_zone'
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- 'for_each_possible_cpu'
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- 'for_each_present_cpu'
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- 'for_each_prime_number'
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- 'for_each_prime_number_from'
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- 'for_each_process'
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- 'for_each_process_thread'
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- 'for_each_property_of_node'
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- 'for_each_registered_fb'
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- 'for_each_requested_gpio'
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- 'for_each_requested_gpio_in_range'
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- 'for_each_reserved_mem_range'
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- 'for_each_reserved_mem_region'
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- 'for_each_rtd_codec_dais'
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- 'for_each_rtd_components'
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- 'for_each_rtd_cpu_dais'
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- 'for_each_rtd_dais'
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- 'for_each_set_bit'
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- 'for_each_set_bit_from'
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- 'for_each_set_clump8'
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- 'for_each_sg'
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- 'for_each_sg_dma_page'
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- 'for_each_sg_page'
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- 'for_each_sgtable_dma_page'
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- 'for_each_sgtable_dma_sg'
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- 'for_each_sgtable_page'
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- 'for_each_sgtable_sg'
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- 'for_each_sibling_event'
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- 'for_each_subelement'
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- 'for_each_subelement_extid'
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- 'for_each_subelement_id'
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- '__for_each_thread'
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- 'for_each_thread'
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- 'for_each_unicast_dest_pgid'
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- 'for_each_vsi'
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- 'for_each_wakeup_source'
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- 'for_each_zone'
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- 'for_each_zone_zonelist'
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- 'for_each_zone_zonelist_nodemask'
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- 'fwnode_for_each_available_child_node'
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- 'fwnode_for_each_child_node'
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- 'fwnode_graph_for_each_endpoint'
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- 'gadget_for_each_ep'
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- 'genradix_for_each'
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- 'genradix_for_each_from'
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- 'hash_for_each'
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- 'hash_for_each_possible'
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- 'hash_for_each_possible_rcu'
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- 'hash_for_each_possible_rcu_notrace'
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- 'hash_for_each_possible_safe'
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- 'hash_for_each_rcu'
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- 'hash_for_each_safe'
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- 'hctx_for_each_ctx'
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- 'hlist_bl_for_each_entry'
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- 'hlist_bl_for_each_entry_rcu'
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- 'hlist_bl_for_each_entry_safe'
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- 'hlist_for_each'
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- 'hlist_for_each_entry'
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- 'hlist_for_each_entry_continue'
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- 'hlist_for_each_entry_continue_rcu'
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- 'hlist_for_each_entry_continue_rcu_bh'
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- 'hlist_for_each_entry_from'
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- 'hlist_for_each_entry_from_rcu'
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- 'hlist_for_each_entry_rcu'
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- 'hlist_for_each_entry_rcu_bh'
|
|
- 'hlist_for_each_entry_rcu_notrace'
|
|
- 'hlist_for_each_entry_safe'
|
|
- 'hlist_for_each_entry_srcu'
|
|
- '__hlist_for_each_rcu'
|
|
- 'hlist_for_each_safe'
|
|
- 'hlist_nulls_for_each_entry'
|
|
- 'hlist_nulls_for_each_entry_from'
|
|
- 'hlist_nulls_for_each_entry_rcu'
|
|
- 'hlist_nulls_for_each_entry_safe'
|
|
- 'i3c_bus_for_each_i2cdev'
|
|
- 'i3c_bus_for_each_i3cdev'
|
|
- 'ide_host_for_each_port'
|
|
- 'ide_port_for_each_dev'
|
|
- 'ide_port_for_each_present_dev'
|
|
- 'idr_for_each_entry'
|
|
- 'idr_for_each_entry_continue'
|
|
- 'idr_for_each_entry_continue_ul'
|
|
- 'idr_for_each_entry_ul'
|
|
- 'in_dev_for_each_ifa_rcu'
|
|
- 'in_dev_for_each_ifa_rtnl'
|
|
- 'inet_bind_bucket_for_each'
|
|
- 'inet_lhash2_for_each_icsk_rcu'
|
|
- 'key_for_each'
|
|
- 'key_for_each_safe'
|
|
- 'klp_for_each_func'
|
|
- 'klp_for_each_func_safe'
|
|
- 'klp_for_each_func_static'
|
|
- 'klp_for_each_object'
|
|
- 'klp_for_each_object_safe'
|
|
- 'klp_for_each_object_static'
|
|
- 'kunit_suite_for_each_test_case'
|
|
- 'kvm_for_each_memslot'
|
|
- 'kvm_for_each_vcpu'
|
|
- 'list_for_each'
|
|
- 'list_for_each_codec'
|
|
- 'list_for_each_codec_safe'
|
|
- 'list_for_each_continue'
|
|
- 'list_for_each_entry'
|
|
- 'list_for_each_entry_continue'
|
|
- 'list_for_each_entry_continue_rcu'
|
|
- 'list_for_each_entry_continue_reverse'
|
|
- 'list_for_each_entry_from'
|
|
- 'list_for_each_entry_from_rcu'
|
|
- 'list_for_each_entry_from_reverse'
|
|
- 'list_for_each_entry_lockless'
|
|
- 'list_for_each_entry_rcu'
|
|
- 'list_for_each_entry_reverse'
|
|
- 'list_for_each_entry_safe'
|
|
- 'list_for_each_entry_safe_continue'
|
|
- 'list_for_each_entry_safe_from'
|
|
- 'list_for_each_entry_safe_reverse'
|
|
- 'list_for_each_entry_srcu'
|
|
- 'list_for_each_prev'
|
|
- 'list_for_each_prev_safe'
|
|
- 'list_for_each_safe'
|
|
- 'llist_for_each'
|
|
- 'llist_for_each_entry'
|
|
- 'llist_for_each_entry_safe'
|
|
- 'llist_for_each_safe'
|
|
- 'mci_for_each_dimm'
|
|
- 'media_device_for_each_entity'
|
|
- 'media_device_for_each_intf'
|
|
- 'media_device_for_each_link'
|
|
- 'media_device_for_each_pad'
|
|
- 'nanddev_io_for_each_page'
|
|
- 'netdev_for_each_lower_dev'
|
|
- 'netdev_for_each_lower_private'
|
|
- 'netdev_for_each_lower_private_rcu'
|
|
- 'netdev_for_each_mc_addr'
|
|
- 'netdev_for_each_uc_addr'
|
|
- 'netdev_for_each_upper_dev_rcu'
|
|
- 'netdev_hw_addr_list_for_each'
|
|
- 'nft_rule_for_each_expr'
|
|
- 'nla_for_each_attr'
|
|
- 'nla_for_each_nested'
|
|
- 'nlmsg_for_each_attr'
|
|
- 'nlmsg_for_each_msg'
|
|
- 'nr_neigh_for_each'
|
|
- 'nr_neigh_for_each_safe'
|
|
- 'nr_node_for_each'
|
|
- 'nr_node_for_each_safe'
|
|
- 'of_for_each_phandle'
|
|
- 'of_property_for_each_string'
|
|
- 'of_property_for_each_u32'
|
|
- 'pci_bus_for_each_resource'
|
|
- 'pcl_for_each_chunk'
|
|
- 'pcl_for_each_segment'
|
|
- 'pcm_for_each_format'
|
|
- 'ping_portaddr_for_each_entry'
|
|
- 'plist_for_each'
|
|
- 'plist_for_each_continue'
|
|
- 'plist_for_each_entry'
|
|
- 'plist_for_each_entry_continue'
|
|
- 'plist_for_each_entry_safe'
|
|
- 'plist_for_each_safe'
|
|
- 'pnp_for_each_card'
|
|
- 'pnp_for_each_dev'
|
|
- 'protocol_for_each_card'
|
|
- 'protocol_for_each_dev'
|
|
- 'queue_for_each_hw_ctx'
|
|
- 'radix_tree_for_each_slot'
|
|
- 'radix_tree_for_each_tagged'
|
|
- 'rbtree_postorder_for_each_entry_safe'
|
|
- 'rdma_for_each_block'
|
|
- 'rdma_for_each_port'
|
|
- 'rdma_umem_for_each_dma_block'
|
|
- 'resource_list_for_each_entry'
|
|
- 'resource_list_for_each_entry_safe'
|
|
- 'rhl_for_each_entry_rcu'
|
|
- 'rhl_for_each_rcu'
|
|
- 'rht_for_each'
|
|
- 'rht_for_each_entry'
|
|
- 'rht_for_each_entry_from'
|
|
- 'rht_for_each_entry_rcu'
|
|
- 'rht_for_each_entry_rcu_from'
|
|
- 'rht_for_each_entry_safe'
|
|
- 'rht_for_each_from'
|
|
- 'rht_for_each_rcu'
|
|
- 'rht_for_each_rcu_from'
|
|
- '__rq_for_each_bio'
|
|
- 'rq_for_each_bvec'
|
|
- 'rq_for_each_segment'
|
|
- 'scsi_for_each_prot_sg'
|
|
- 'scsi_for_each_sg'
|
|
- 'sctp_for_each_hentry'
|
|
- 'sctp_skb_for_each'
|
|
- 'shdma_for_each_chan'
|
|
- '__shost_for_each_device'
|
|
- 'shost_for_each_device'
|
|
- 'sk_for_each'
|
|
- 'sk_for_each_bound'
|
|
- 'sk_for_each_entry_offset_rcu'
|
|
- 'sk_for_each_from'
|
|
- 'sk_for_each_rcu'
|
|
- 'sk_for_each_safe'
|
|
- 'sk_nulls_for_each'
|
|
- 'sk_nulls_for_each_from'
|
|
- 'sk_nulls_for_each_rcu'
|
|
- 'snd_array_for_each'
|
|
- 'snd_pcm_group_for_each_entry'
|
|
- 'snd_soc_dapm_widget_for_each_path'
|
|
- 'snd_soc_dapm_widget_for_each_path_safe'
|
|
- 'snd_soc_dapm_widget_for_each_sink_path'
|
|
- 'snd_soc_dapm_widget_for_each_source_path'
|
|
- 'tb_property_for_each'
|
|
- 'tcf_exts_for_each_action'
|
|
- 'udp_portaddr_for_each_entry'
|
|
- 'udp_portaddr_for_each_entry_rcu'
|
|
- 'usb_hub_for_each_child'
|
|
- 'v4l2_device_for_each_subdev'
|
|
- 'v4l2_m2m_for_each_dst_buf'
|
|
- 'v4l2_m2m_for_each_dst_buf_safe'
|
|
- 'v4l2_m2m_for_each_src_buf'
|
|
- 'v4l2_m2m_for_each_src_buf_safe'
|
|
- 'virtio_device_for_each_vq'
|
|
- 'while_for_each_ftrace_op'
|
|
- 'xa_for_each'
|
|
- 'xa_for_each_marked'
|
|
- 'xa_for_each_range'
|
|
- 'xa_for_each_start'
|
|
- 'xas_for_each'
|
|
- 'xas_for_each_conflict'
|
|
- 'xas_for_each_marked'
|
|
- 'xbc_array_for_each_value'
|
|
- 'xbc_for_each_key_value'
|
|
- 'xbc_node_for_each_array_value'
|
|
- 'xbc_node_for_each_child'
|
|
- 'xbc_node_for_each_key_value'
|
|
- 'zorro_for_each_dev'
|
|
|
|
#IncludeBlocks: Preserve # Unknown to clang-format-5.0
|
|
IncludeCategories:
|
|
- Regex: '.*'
|
|
Priority: 1
|
|
IncludeIsMainRegex: '(Test)?$'
|
|
IndentCaseLabels: false
|
|
#IndentPPDirectives: None # Unknown to clang-format-5.0
|
|
IndentWidth: 8
|
|
IndentWrappedFunctionNames: false
|
|
JavaScriptQuotes: Leave
|
|
JavaScriptWrapImports: true
|
|
KeepEmptyLinesAtTheStartOfBlocks: false
|
|
MacroBlockBegin: ''
|
|
MacroBlockEnd: ''
|
|
MaxEmptyLinesToKeep: 1
|
|
NamespaceIndentation: None
|
|
#ObjCBinPackProtocolList: Auto # Unknown to clang-format-5.0
|
|
ObjCBlockIndentWidth: 8
|
|
ObjCSpaceAfterProperty: true
|
|
ObjCSpaceBeforeProtocolList: true
|
|
|
|
# Taken from git's rules
|
|
#PenaltyBreakAssignment: 10 # Unknown to clang-format-4.0
|
|
PenaltyBreakBeforeFirstCallParameter: 30
|
|
PenaltyBreakComment: 10
|
|
PenaltyBreakFirstLessLess: 0
|
|
PenaltyBreakString: 10
|
|
PenaltyExcessCharacter: 100
|
|
PenaltyReturnTypeOnItsOwnLine: 60
|
|
|
|
PointerAlignment: Right
|
|
ReflowComments: false
|
|
SortIncludes: false
|
|
#SortUsingDeclarations: false # Unknown to clang-format-4.0
|
|
SpaceAfterCStyleCast: false
|
|
SpaceAfterTemplateKeyword: true
|
|
SpaceBeforeAssignmentOperators: true
|
|
#SpaceBeforeCtorInitializerColon: true # Unknown to clang-format-5.0
|
|
#SpaceBeforeInheritanceColon: true # Unknown to clang-format-5.0
|
|
SpaceBeforeParens: ControlStatements
|
|
#SpaceBeforeRangeBasedForLoopColon: true # Unknown to clang-format-5.0
|
|
SpaceInEmptyParentheses: false
|
|
SpacesBeforeTrailingComments: 1
|
|
SpacesInAngles: false
|
|
SpacesInContainerLiterals: false
|
|
SpacesInCStyleCastParentheses: false
|
|
SpacesInParentheses: false
|
|
SpacesInSquareBrackets: false
|
|
Standard: Cpp03
|
|
TabWidth: 8
|
|
UseTab: Always
|
|
...
|