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140b086dd1
Processing maintenance interrupts and accessing the list registers are dependent on the host's GIC version. Introduce vgic-v2.c to contain GICv2 specific functions. Implement the GICv2 specific code for syncing the emulation state into the VGIC registers. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Eric Auger <eric.auger@linaro.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Eric Auger <eric.auger@linaro.org> Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> |
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.. | ||
arm-gic-common.h | ||
arm-gic-v3.h | ||
arm-gic.h | ||
arm-vic.h | ||
chained_irq.h | ||
ingenic.h | ||
irq-omap-intc.h | ||
irq-sa11x0.h | ||
metag-ext.h | ||
metag.h | ||
mips-gic.h | ||
mmp.h | ||
mxs.h | ||
versatile-fpga.h | ||
xtensa-mx.h | ||
xtensa-pic.h |