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![David S. Miller](/assets/img/avatar_default.png)
Synchronize with 'net' in order to sort out some l2tp, wireless, and ipv6 GRE fixes that will be built on top of in 'net-next'. Signed-off-by: David S. Miller <davem@davemloft.net>
210 lines
5.2 KiB
C
210 lines
5.2 KiB
C
/*
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* Sonics Silicon Backplane
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* GPIO driver
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*
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* Copyright 2011, Broadcom Corporation
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* Copyright 2012, Hauke Mehrtens <hauke@hauke-m.de>
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*
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* Licensed under the GNU/GPL. See COPYING for details.
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*/
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#include <linux/gpio.h>
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#include <linux/export.h>
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#include <linux/ssb/ssb.h>
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#include "ssb_private.h"
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static struct ssb_bus *ssb_gpio_get_bus(struct gpio_chip *chip)
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{
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return container_of(chip, struct ssb_bus, gpio);
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}
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static int ssb_gpio_chipco_get_value(struct gpio_chip *chip, unsigned gpio)
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{
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struct ssb_bus *bus = ssb_gpio_get_bus(chip);
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return !!ssb_chipco_gpio_in(&bus->chipco, 1 << gpio);
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}
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static void ssb_gpio_chipco_set_value(struct gpio_chip *chip, unsigned gpio,
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int value)
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{
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struct ssb_bus *bus = ssb_gpio_get_bus(chip);
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ssb_chipco_gpio_out(&bus->chipco, 1 << gpio, value ? 1 << gpio : 0);
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}
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static int ssb_gpio_chipco_direction_input(struct gpio_chip *chip,
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unsigned gpio)
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{
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struct ssb_bus *bus = ssb_gpio_get_bus(chip);
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ssb_chipco_gpio_outen(&bus->chipco, 1 << gpio, 0);
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return 0;
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}
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static int ssb_gpio_chipco_direction_output(struct gpio_chip *chip,
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unsigned gpio, int value)
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{
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struct ssb_bus *bus = ssb_gpio_get_bus(chip);
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ssb_chipco_gpio_outen(&bus->chipco, 1 << gpio, 1 << gpio);
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ssb_chipco_gpio_out(&bus->chipco, 1 << gpio, value ? 1 << gpio : 0);
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return 0;
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}
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static int ssb_gpio_chipco_request(struct gpio_chip *chip, unsigned gpio)
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{
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struct ssb_bus *bus = ssb_gpio_get_bus(chip);
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ssb_chipco_gpio_control(&bus->chipco, 1 << gpio, 0);
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/* clear pulldown */
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ssb_chipco_gpio_pulldown(&bus->chipco, 1 << gpio, 0);
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/* Set pullup */
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ssb_chipco_gpio_pullup(&bus->chipco, 1 << gpio, 1 << gpio);
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return 0;
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}
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static void ssb_gpio_chipco_free(struct gpio_chip *chip, unsigned gpio)
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{
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struct ssb_bus *bus = ssb_gpio_get_bus(chip);
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/* clear pullup */
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ssb_chipco_gpio_pullup(&bus->chipco, 1 << gpio, 0);
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}
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static int ssb_gpio_chipco_to_irq(struct gpio_chip *chip, unsigned gpio)
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{
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struct ssb_bus *bus = ssb_gpio_get_bus(chip);
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if (bus->bustype == SSB_BUSTYPE_SSB)
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return ssb_mips_irq(bus->chipco.dev) + 2;
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else
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return -EINVAL;
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}
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static int ssb_gpio_chipco_init(struct ssb_bus *bus)
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{
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struct gpio_chip *chip = &bus->gpio;
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chip->label = "ssb_chipco_gpio";
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chip->owner = THIS_MODULE;
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chip->request = ssb_gpio_chipco_request;
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chip->free = ssb_gpio_chipco_free;
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chip->get = ssb_gpio_chipco_get_value;
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chip->set = ssb_gpio_chipco_set_value;
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chip->direction_input = ssb_gpio_chipco_direction_input;
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chip->direction_output = ssb_gpio_chipco_direction_output;
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chip->to_irq = ssb_gpio_chipco_to_irq;
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chip->ngpio = 16;
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/* There is just one SoC in one device and its GPIO addresses should be
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* deterministic to address them more easily. The other buses could get
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* a random base number. */
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if (bus->bustype == SSB_BUSTYPE_SSB)
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chip->base = 0;
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else
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chip->base = -1;
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return gpiochip_add(chip);
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}
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#ifdef CONFIG_SSB_DRIVER_EXTIF
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static int ssb_gpio_extif_get_value(struct gpio_chip *chip, unsigned gpio)
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{
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struct ssb_bus *bus = ssb_gpio_get_bus(chip);
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return !!ssb_extif_gpio_in(&bus->extif, 1 << gpio);
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}
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static void ssb_gpio_extif_set_value(struct gpio_chip *chip, unsigned gpio,
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int value)
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{
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struct ssb_bus *bus = ssb_gpio_get_bus(chip);
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ssb_extif_gpio_out(&bus->extif, 1 << gpio, value ? 1 << gpio : 0);
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}
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static int ssb_gpio_extif_direction_input(struct gpio_chip *chip,
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unsigned gpio)
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{
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struct ssb_bus *bus = ssb_gpio_get_bus(chip);
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ssb_extif_gpio_outen(&bus->extif, 1 << gpio, 0);
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return 0;
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}
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static int ssb_gpio_extif_direction_output(struct gpio_chip *chip,
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unsigned gpio, int value)
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{
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struct ssb_bus *bus = ssb_gpio_get_bus(chip);
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ssb_extif_gpio_outen(&bus->extif, 1 << gpio, 1 << gpio);
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ssb_extif_gpio_out(&bus->extif, 1 << gpio, value ? 1 << gpio : 0);
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return 0;
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}
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static int ssb_gpio_extif_to_irq(struct gpio_chip *chip, unsigned gpio)
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{
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struct ssb_bus *bus = ssb_gpio_get_bus(chip);
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if (bus->bustype == SSB_BUSTYPE_SSB)
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return ssb_mips_irq(bus->extif.dev) + 2;
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else
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return -EINVAL;
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}
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static int ssb_gpio_extif_init(struct ssb_bus *bus)
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{
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struct gpio_chip *chip = &bus->gpio;
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chip->label = "ssb_extif_gpio";
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chip->owner = THIS_MODULE;
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chip->get = ssb_gpio_extif_get_value;
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chip->set = ssb_gpio_extif_set_value;
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chip->direction_input = ssb_gpio_extif_direction_input;
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chip->direction_output = ssb_gpio_extif_direction_output;
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chip->to_irq = ssb_gpio_extif_to_irq;
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chip->ngpio = 5;
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/* There is just one SoC in one device and its GPIO addresses should be
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* deterministic to address them more easily. The other buses could get
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* a random base number. */
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if (bus->bustype == SSB_BUSTYPE_SSB)
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chip->base = 0;
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else
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chip->base = -1;
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return gpiochip_add(chip);
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}
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#else
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static int ssb_gpio_extif_init(struct ssb_bus *bus)
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{
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return -ENOTSUPP;
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}
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#endif
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int ssb_gpio_init(struct ssb_bus *bus)
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{
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if (ssb_chipco_available(&bus->chipco))
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return ssb_gpio_chipco_init(bus);
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else if (ssb_extif_available(&bus->extif))
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return ssb_gpio_extif_init(bus);
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else
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SSB_WARN_ON(1);
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return -1;
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}
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int ssb_gpio_unregister(struct ssb_bus *bus)
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{
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if (ssb_chipco_available(&bus->chipco) ||
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ssb_extif_available(&bus->extif)) {
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return gpiochip_remove(&bus->gpio);
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} else {
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SSB_WARN_ON(1);
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}
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return -1;
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}
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