Palmer Dabbelt ffd3e67f0d riscv/mm: Add XIP_FIXUP for riscv_pfn_base ... [ Upstream commit ca0cb9a60f ] This manifests as a crash early in boot on VexRiscv. Signed-off-by: Myrtle Shah <gatecat@ds0.me> [Palmer: split commit] Fixes: 44c9225729 ("RISC-V: enable XIP") Cc: stable@vger.kernel.org Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Sasha Levin <sashal@kernel.org>		2022-07-12 16:35:01 +02:00
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cacheflush.c	riscv: Flush current cpu icache before other cpus	2021-10-04 18:24:15 -07:00
context.c	riscv: add ASID-based tlbflushing methods	2021-06-30 20:55:39 -07:00
extable.c
fault.c	riscv: Enable KFENCE for riscv64	2021-06-30 20:55:41 -07:00
hugetlbpage.c	hugetlbfs: remove hugetlb_add_hstate() warning for existing hstate	2020-06-03 20:09:46 -07:00
init.c	riscv/mm: Add XIP_FIXUP for riscv_pfn_base	2022-07-12 16:35:01 +02:00
kasan_init.c	riscv: Fix config KASAN && SPARSEMEM && !SPARSE_VMEMMAP	2022-03-08 19:12:42 +01:00
Makefile	riscv: Fix config KASAN && DEBUG_VIRTUAL	2022-03-08 19:12:42 +01:00
pageattr.c	RISC-V Patches for the 5.11 Merge Window, Part 1	2020-12-18 10:43:07 -08:00
physaddr.c	riscv: Introduce structure that group all variables regarding kernel mapping	2021-07-05 18:04:00 -07:00
ptdump.c	riscv: Fix PTDUMP output now BPF region moved back to module region	2021-07-06 15:21:27 -07:00
tlbflush.c	riscv: add ASID-based tlbflushing methods	2021-06-30 20:55:39 -07:00