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38bb46f945
The GNU assembler (as of 2.40) mis-treats FCSR operands as GPRs, but the LLVM IAS does not. Probe for this and refer to FCSRs as "$fcsrNN" if support is present. Signed-off-by: WANG Xuerui <git@xen0n.name> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
59 lines
1.2 KiB
C
59 lines
1.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Definitions for the FPU register names
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*
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* Copyright (C) 2020-2022 Loongson Technology Corporation Limited
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*/
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#ifndef _ASM_FPREGDEF_H
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#define _ASM_FPREGDEF_H
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#define fa0 $f0 /* argument registers, fa0/fa1 reused as fv0/fv1 for return value */
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#define fa1 $f1
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#define fa2 $f2
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#define fa3 $f3
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#define fa4 $f4
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#define fa5 $f5
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#define fa6 $f6
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#define fa7 $f7
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#define ft0 $f8 /* caller saved */
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#define ft1 $f9
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#define ft2 $f10
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#define ft3 $f11
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#define ft4 $f12
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#define ft5 $f13
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#define ft6 $f14
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#define ft7 $f15
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#define ft8 $f16
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#define ft9 $f17
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#define ft10 $f18
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#define ft11 $f19
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#define ft12 $f20
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#define ft13 $f21
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#define ft14 $f22
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#define ft15 $f23
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#define fs0 $f24 /* callee saved */
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#define fs1 $f25
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#define fs2 $f26
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#define fs3 $f27
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#define fs4 $f28
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#define fs5 $f29
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#define fs6 $f30
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#define fs7 $f31
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#ifndef CONFIG_AS_HAS_FCSR_CLASS
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/*
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* Current binutils expects *GPRs* at FCSR position for the FCSR
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* operation instructions, so define aliases for those used.
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*/
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#define fcsr0 $r0
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#define fcsr1 $r1
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#define fcsr2 $r2
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#define fcsr3 $r3
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#else
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#define fcsr0 $fcsr0
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#define fcsr1 $fcsr1
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#define fcsr2 $fcsr2
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#define fcsr3 $fcsr3
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#endif
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#endif /* _ASM_FPREGDEF_H */
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