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800149a77c
Add sign extension to the $badaddr before addressing the instruction page fault and instruction access fault to workaround the issue "cip-453". To avoid affecting the existing code sequence, this patch will creates two trampolines to add sign extension to the $badaddr. By the "alternative" mechanism, these two trampolines will replace the original exception handler of instruction page fault and instruction access fault in the excp_vect_table. In this case, only the specific SiFive CPU core jumps to the do_page_fault and do_trap_insn_fault through these two trampolines. Other CPUs are not affected. Signed-off-by: Vincent Chen <vincent.chen@sifive.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
38 lines
799 B
ArmAsm
38 lines
799 B
ArmAsm
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2021 SiFive
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*/
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#include <linux/linkage.h>
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#include <asm/asm.h>
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#include <asm/asm-offsets.h>
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#include <asm/alternative.h>
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.macro ADD_SIGN_EXT pt_reg badaddr tmp_reg
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REG_L \badaddr, PT_BADADDR(\pt_reg)
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li \tmp_reg,1
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slli \tmp_reg,\tmp_reg,0x26
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and \tmp_reg,\tmp_reg,\badaddr
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beqz \tmp_reg, 1f
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li \tmp_reg,-1
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slli \tmp_reg,\tmp_reg,0x27
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or \badaddr,\tmp_reg,\badaddr
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REG_S \badaddr, PT_BADADDR(\pt_reg)
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1:
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.endm
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ENTRY(sifive_cip_453_page_fault_trp)
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ADD_SIGN_EXT a0, t0, t1
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#ifdef CONFIG_MMU
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la t0, do_page_fault
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#else
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la t0, do_trap_unknown
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#endif
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jr t0
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END(sifive_cip_453_page_fault_trp)
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ENTRY(sifive_cip_453_insn_fault_trp)
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ADD_SIGN_EXT a0, t0, t1
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la t0, do_trap_insn_fault
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jr t0
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END(sifive_cip_453_insn_fault_trp)
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