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82e9c66e81
The kernel maintains a mask of ISA extensions ANDed together across all harts. Let's also keep a bitmap of ISA extensions for each CPU. Although the kernel is currently unlikely to enable a feature that exists only on some CPUs, we want the ability to report asymmetric CPU extensions accurately to usermode. Note that riscv_fill_hwcaps() runs before the per_cpu_offsets are built, which is why I've used a [NR_CPUS] array rather than per_cpu() data. Signed-off-by: Evan Green <evan@rivosinc.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com> Link: https://lore.kernel.org/r/20230509182504.2997252-3-evan@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
33 lines
661 B
C
33 lines
661 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright 2022-2023 Rivos, Inc
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*/
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#ifndef _ASM_CPUFEATURE_H
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#define _ASM_CPUFEATURE_H
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#include <linux/bitmap.h>
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#include <asm/hwcap.h>
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/*
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* These are probed via a device_initcall(), via either the SBI or directly
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* from the corresponding CSRs.
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*/
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struct riscv_cpuinfo {
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unsigned long mvendorid;
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unsigned long marchid;
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unsigned long mimpid;
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};
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struct riscv_isainfo {
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DECLARE_BITMAP(isa, RISCV_ISA_EXT_MAX);
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};
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DECLARE_PER_CPU(struct riscv_cpuinfo, riscv_cpuinfo);
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DECLARE_PER_CPU(long, misaligned_access_speed);
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/* Per-cpu ISA extensions. */
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extern struct riscv_isainfo hart_isa[NR_CPUS];
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#endif
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