310 lines
6.0 KiB
C
310 lines
6.0 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* (c) 1997-1998 Grant R. Guenther <grant@torque.net>
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*
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* epia.c is a low-level protocol driver for Shuttle Technologies
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* EPIA parallel to IDE adapter chip. This device is now obsolete
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* and has been replaced with the EPAT chip, which is supported
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* by epat.c, however, some devices based on EPIA are still
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* available.
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/wait.h>
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#include <asm/io.h>
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#include "pata_parport.h"
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/*
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* mode codes: 0 nybble reads on port 1, 8-bit writes
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* 1 5/3 reads on ports 1 & 2, 8-bit writes
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* 2 8-bit reads and writes
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* 3 8-bit EPP mode
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* 4 16-bit EPP
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* 5 32-bit EPP
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*/
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#define j44(a, b) (((a >> 4) & 0x0f) + (b & 0xf0))
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#define j53(a, b) (((a >> 3) & 0x1f) + ((b << 4) & 0xe0))
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/*
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* cont = 0 IDE register file
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* cont = 1 IDE control registers
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*/
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static int cont_map[2] = { 0, 0x80 };
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static int epia_read_regr(struct pi_adapter *pi, int cont, int regr)
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{
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int a, b, r;
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regr += cont_map[cont];
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switch (pi->mode) {
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case 0:
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r = regr ^ 0x39;
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w0(r); w2(1); w2(3); w0(r);
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a = r1(); w2(1); b = r1(); w2(4);
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return j44(a, b);
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case 1:
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r = regr ^ 0x31;
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w0(r); w2(1); w0(r & 0x37);
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w2(3); w2(5); w0(r | 0xf0);
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a = r1(); b = r2(); w2(4);
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return j53(a, b);
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case 2:
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r = regr^0x29;
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w0(r); w2(1); w2(0X21); w2(0x23);
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a = r0(); w2(4);
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return a;
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case 3:
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case 4:
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case 5:
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w3(regr); w2(0x24); a = r4(); w2(4);
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return a;
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}
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return -1;
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}
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static void epia_write_regr(struct pi_adapter *pi, int cont, int regr, int val)
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{
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int r;
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regr += cont_map[cont];
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switch (pi->mode) {
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case 0:
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case 1:
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case 2:
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r = regr ^ 0x19;
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w0(r); w2(1); w0(val); w2(3); w2(4);
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break;
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case 3:
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case 4:
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case 5:
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r = regr ^ 0x40;
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w3(r); w4(val); w2(4);
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break;
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}
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}
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#define WR(r, v) epia_write_regr(pi, 0, r, v)
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#define RR(r) epia_read_regr(pi, 0, r)
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/*
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* The use of register 0x84 is entirely unclear - it seems to control
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* some EPP counters ... currently we know about 3 different block
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* sizes: the standard 512 byte reads and writes, 12 byte writes and
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* 2048 byte reads (the last two being used in the CDrom drivers.
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*/
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static void epia_connect(struct pi_adapter *pi)
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{
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pi->saved_r0 = r0();
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pi->saved_r2 = r2();
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w2(4); w0(0xa0); w0(0x50); w0(0xc0); w0(0x30); w0(0xa0); w0(0);
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w2(1); w2(4);
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if (pi->mode >= 3) {
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w0(0xa); w2(1); w2(4); w0(0x82); w2(4); w2(0xc); w2(4);
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w2(0x24); w2(0x26); w2(4);
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}
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WR(0x86, 8);
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}
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static void epia_disconnect(struct pi_adapter *pi)
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{
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/* WR(0x84,0x10); */
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w0(pi->saved_r0);
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w2(1); w2(4);
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w0(pi->saved_r0);
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w2(pi->saved_r2);
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}
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static void epia_read_block(struct pi_adapter *pi, char *buf, int count)
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{
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int k, ph, a, b;
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switch (pi->mode) {
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case 0:
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w0(0x81); w2(1); w2(3); w0(0xc1);
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ph = 1;
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for (k = 0; k < count; k++) {
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w2(2+ph); a = r1();
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w2(4+ph); b = r1();
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buf[k] = j44(a, b);
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ph = 1 - ph;
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}
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w0(0); w2(4);
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break;
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case 1:
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w0(0x91); w2(1); w0(0x10); w2(3);
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w0(0x51); w2(5); w0(0xd1);
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ph = 1;
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for (k = 0; k < count; k++) {
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w2(4 + ph);
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a = r1(); b = r2();
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buf[k] = j53(a, b);
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ph = 1 - ph;
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}
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w0(0); w2(4);
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break;
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case 2:
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w0(0x89); w2(1); w2(0x23); w2(0x21);
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ph = 1;
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for (k = 0; k < count; k++) {
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w2(0x24 + ph);
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buf[k] = r0();
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ph = 1 - ph;
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}
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w2(6); w2(4);
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break;
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case 3:
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if (count > 512)
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WR(0x84, 3);
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w3(0); w2(0x24);
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for (k = 0; k < count; k++)
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buf[k] = r4();
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w2(4); WR(0x84, 0);
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break;
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case 4:
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if (count > 512)
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WR(0x84, 3);
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w3(0); w2(0x24);
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for (k = 0; k < count / 2; k++)
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((u16 *)buf)[k] = r4w();
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w2(4); WR(0x84, 0);
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break;
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case 5:
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if (count > 512)
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WR(0x84, 3);
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w3(0); w2(0x24);
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for (k = 0; k < count / 4; k++)
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((u32 *)buf)[k] = r4l();
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w2(4); WR(0x84, 0);
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break;
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}
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}
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static void epia_write_block(struct pi_adapter *pi, char *buf, int count)
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{
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int ph, k, last, d;
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switch (pi->mode) {
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case 0:
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case 1:
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case 2:
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w0(0xa1); w2(1); w2(3); w2(1); w2(5);
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ph = 0; last = 0x8000;
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for (k = 0; k < count; k++) {
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d = buf[k];
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if (d != last) {
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last = d;
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w0(d);
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}
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w2(4 + ph);
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ph = 1 - ph;
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}
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w2(7); w2(4);
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break;
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case 3:
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if (count < 512)
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WR(0x84, 1);
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w3(0x40);
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for (k = 0; k < count; k++)
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w4(buf[k]);
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if (count < 512)
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WR(0x84, 0);
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break;
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case 4:
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if (count < 512)
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WR(0x84, 1);
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w3(0x40);
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for (k = 0; k < count / 2; k++)
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w4w(((u16 *)buf)[k]);
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if (count < 512)
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WR(0x84, 0);
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break;
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case 5:
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if (count < 512)
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WR(0x84, 1);
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w3(0x40);
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for (k = 0; k < count / 4; k++)
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w4l(((u32 *)buf)[k]);
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if (count < 512)
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WR(0x84, 0);
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break;
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}
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}
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static int epia_test_proto(struct pi_adapter *pi)
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{
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int j, k, f;
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int e[2] = { 0, 0 };
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char scratch[512];
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epia_connect(pi);
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for (j = 0; j < 2; j++) {
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WR(6, 0xa0 + j * 0x10);
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for (k = 0; k < 256; k++) {
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WR(2, k ^ 0xaa);
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WR(3, k ^ 0x55);
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if (RR(2) != (k ^ 0xaa))
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e[j]++;
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}
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WR(2, 1); WR(3, 1);
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}
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epia_disconnect(pi);
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f = 0;
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epia_connect(pi);
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WR(0x84, 8);
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epia_read_block(pi, scratch, 512);
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for (k = 0; k < 256; k++) {
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if ((scratch[2 * k] & 0xff) != ((k + 1) & 0xff))
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f++;
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if ((scratch[2 * k + 1] & 0xff) != ((-2 - k) & 0xff))
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f++;
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}
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WR(0x84, 0);
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epia_disconnect(pi);
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dev_dbg(&pi->dev, "epia: port 0x%x, mode %d, test=(%d,%d,%d)\n",
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pi->port, pi->mode, e[0], e[1], f);
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return (e[0] && e[1]) || f;
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}
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static void epia_log_adapter(struct pi_adapter *pi)
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{
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char *mode[6] = { "4-bit", "5/3", "8-bit", "EPP-8", "EPP-16", "EPP-32"};
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dev_info(&pi->dev,
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"Shuttle EPIA at 0x%x, mode %d (%s), delay %d\n",
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pi->port, pi->mode, mode[pi->mode], pi->delay);
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}
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static struct pi_protocol epia = {
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.owner = THIS_MODULE,
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.name = "epia",
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.max_mode = 6,
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.epp_first = 3,
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.default_delay = 1,
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.max_units = 1,
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.write_regr = epia_write_regr,
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.read_regr = epia_read_regr,
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.write_block = epia_write_block,
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.read_block = epia_read_block,
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.connect = epia_connect,
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.disconnect = epia_disconnect,
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.test_proto = epia_test_proto,
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.log_adapter = epia_log_adapter,
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};
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MODULE_LICENSE("GPL");
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module_pata_parport_driver(epia);
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