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6249bda68f
The resets property is used in DT sources in the kernel tree. Document it and make it mandatory. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
69 lines
1.6 KiB
YAML
69 lines
1.6 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/media/renesas,fdp1.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Renesas R-Car Fine Display Processor (FDP1)
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maintainers:
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- Laurent Pinchart <laurent.pinchart@ideasonboard.com>
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description:
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The FDP1 is a de-interlacing module which converts interlaced video to
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progressive video. It is capable of performing pixel format conversion
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between YCbCr/YUV formats and RGB formats. Only YCbCr/YUV formats are
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supported as an input to the module.
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properties:
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compatible:
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enum:
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- renesas,fdp1
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 1
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power-domains:
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maxItems: 1
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resets:
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maxItems: 1
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renesas,fcp:
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$ref: /schemas/types.yaml#/definitions/phandle
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description:
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A phandle referencing the FCP that handles memory accesses for the FDP1.
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Not allowed on R-Car Gen2, mandatory on R-Car Gen3.
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- power-domains
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- resets
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/renesas-cpg-mssr.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/power/r8a7795-sysc.h>
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fdp1@fe940000 {
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compatible = "renesas,fdp1";
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reg = <0xfe940000 0x2400>;
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interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 119>;
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power-domains = <&sysc R8A7795_PD_A3VP>;
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resets = <&cpg 119>;
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renesas,fcp = <&fcpf0>;
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};
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...
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