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b30fc68e6c
It is possible to declare a gate with a fixed divider, by using the CCU_FEATURE_ALL_PREDIV flag. Since this is not obvious, add a macro for declaring this type of clock. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20211119043545.4010-6-samuel@sholland.org
127 lines
3.1 KiB
C
127 lines
3.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2016 Maxime Ripard. All rights reserved.
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*/
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#ifndef _CCU_GATE_H_
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#define _CCU_GATE_H_
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#include <linux/clk-provider.h>
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#include "ccu_common.h"
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struct ccu_gate {
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u32 enable;
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struct ccu_common common;
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};
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#define SUNXI_CCU_GATE(_struct, _name, _parent, _reg, _gate, _flags) \
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struct ccu_gate _struct = { \
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.enable = _gate, \
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.common = { \
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.reg = _reg, \
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.hw.init = CLK_HW_INIT(_name, \
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_parent, \
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&ccu_gate_ops, \
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_flags), \
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} \
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}
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#define SUNXI_CCU_GATE_HW(_struct, _name, _parent, _reg, _gate, _flags) \
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struct ccu_gate _struct = { \
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.enable = _gate, \
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.common = { \
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.reg = _reg, \
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.hw.init = CLK_HW_INIT_HW(_name, \
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_parent, \
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&ccu_gate_ops, \
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_flags), \
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} \
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}
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#define SUNXI_CCU_GATE_FW(_struct, _name, _parent, _reg, _gate, _flags) \
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struct ccu_gate _struct = { \
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.enable = _gate, \
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.common = { \
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.reg = _reg, \
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.hw.init = CLK_HW_INIT_FW_NAME(_name, \
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_parent, \
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&ccu_gate_ops, \
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_flags), \
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} \
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}
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/*
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* The following macros allow the re-use of the data structure
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* holding the parent info.
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*/
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#define SUNXI_CCU_GATE_HWS(_struct, _name, _parent, _reg, _gate, _flags) \
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struct ccu_gate _struct = { \
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.enable = _gate, \
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.common = { \
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.reg = _reg, \
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.hw.init = CLK_HW_INIT_HWS(_name, \
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_parent, \
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&ccu_gate_ops, \
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_flags), \
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} \
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}
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#define SUNXI_CCU_GATE_HWS_WITH_PREDIV(_struct, _name, _parent, _reg, \
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_gate, _prediv, _flags) \
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struct ccu_gate _struct = { \
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.enable = _gate, \
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.common = { \
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.reg = _reg, \
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.prediv = _prediv, \
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.features = CCU_FEATURE_ALL_PREDIV, \
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.hw.init = CLK_HW_INIT_HWS(_name, \
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_parent, \
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&ccu_gate_ops, \
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_flags), \
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} \
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}
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#define SUNXI_CCU_GATE_DATA(_struct, _name, _data, _reg, _gate, _flags) \
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struct ccu_gate _struct = { \
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.enable = _gate, \
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.common = { \
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.reg = _reg, \
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.hw.init = \
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CLK_HW_INIT_PARENTS_DATA(_name, \
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_data, \
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&ccu_gate_ops, \
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_flags), \
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} \
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}
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#define SUNXI_CCU_GATE_DATA_WITH_PREDIV(_struct, _name, _parent, _reg, \
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_gate, _prediv, _flags) \
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struct ccu_gate _struct = { \
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.enable = _gate, \
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.common = { \
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.reg = _reg, \
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.prediv = _prediv, \
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.features = CCU_FEATURE_ALL_PREDIV, \
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.hw.init = CLK_HW_INIT_PARENTS_DATA(_name, \
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_parent, \
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&ccu_gate_ops, \
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_flags), \
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} \
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}
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static inline struct ccu_gate *hw_to_ccu_gate(struct clk_hw *hw)
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{
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struct ccu_common *common = hw_to_ccu_common(hw);
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return container_of(common, struct ccu_gate, common);
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}
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void ccu_gate_helper_disable(struct ccu_common *common, u32 gate);
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int ccu_gate_helper_enable(struct ccu_common *common, u32 gate);
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int ccu_gate_helper_is_enabled(struct ccu_common *common, u32 gate);
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extern const struct clk_ops ccu_gate_ops;
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#endif /* _CCU_GATE_H_ */
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