mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-10-30 08:02:30 +00:00
2ba738d56d
Add support for the R-Car M3-W+ (R8A77961) SoC to the Renesas Clock Pulse Generator / Module Standby and Software Reset driver. R-Car M3-W+ is very similar to R-Car M3-W (R8A77960), which allows for both SoCs to share a driver. R-Car M3-W+ lacks a few modules, so their clocks must be nullified. Based on a patch in the BSP by Takeshi Kihara <takeshi.kihara.df@renesas.com>. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20191023122941.12342-5-geert+renesas@glider.be
39 lines
1.6 KiB
Makefile
39 lines
1.6 KiB
Makefile
# SPDX-License-Identifier: GPL-2.0
|
|
# SoC
|
|
obj-$(CONFIG_CLK_EMEV2) += clk-emev2.o
|
|
obj-$(CONFIG_CLK_RZA1) += clk-rz.o
|
|
obj-$(CONFIG_CLK_R7S9210) += r7s9210-cpg-mssr.o
|
|
obj-$(CONFIG_CLK_R8A73A4) += clk-r8a73a4.o
|
|
obj-$(CONFIG_CLK_R8A7740) += clk-r8a7740.o
|
|
obj-$(CONFIG_CLK_R8A7743) += r8a7743-cpg-mssr.o
|
|
obj-$(CONFIG_CLK_R8A7745) += r8a7745-cpg-mssr.o
|
|
obj-$(CONFIG_CLK_R8A77470) += r8a77470-cpg-mssr.o
|
|
obj-$(CONFIG_CLK_R8A774A1) += r8a774a1-cpg-mssr.o
|
|
obj-$(CONFIG_CLK_R8A774B1) += r8a774b1-cpg-mssr.o
|
|
obj-$(CONFIG_CLK_R8A774C0) += r8a774c0-cpg-mssr.o
|
|
obj-$(CONFIG_CLK_R8A7778) += clk-r8a7778.o
|
|
obj-$(CONFIG_CLK_R8A7779) += clk-r8a7779.o
|
|
obj-$(CONFIG_CLK_R8A7790) += r8a7790-cpg-mssr.o
|
|
obj-$(CONFIG_CLK_R8A7791) += r8a7791-cpg-mssr.o
|
|
obj-$(CONFIG_CLK_R8A7792) += r8a7792-cpg-mssr.o
|
|
obj-$(CONFIG_CLK_R8A7794) += r8a7794-cpg-mssr.o
|
|
obj-$(CONFIG_CLK_R8A7795) += r8a7795-cpg-mssr.o
|
|
obj-$(CONFIG_CLK_R8A77960) += r8a7796-cpg-mssr.o
|
|
obj-$(CONFIG_CLK_R8A77961) += r8a7796-cpg-mssr.o
|
|
obj-$(CONFIG_CLK_R8A77965) += r8a77965-cpg-mssr.o
|
|
obj-$(CONFIG_CLK_R8A77970) += r8a77970-cpg-mssr.o
|
|
obj-$(CONFIG_CLK_R8A77980) += r8a77980-cpg-mssr.o
|
|
obj-$(CONFIG_CLK_R8A77990) += r8a77990-cpg-mssr.o
|
|
obj-$(CONFIG_CLK_R8A77995) += r8a77995-cpg-mssr.o
|
|
obj-$(CONFIG_CLK_R9A06G032) += r9a06g032-clocks.o
|
|
obj-$(CONFIG_CLK_SH73A0) += clk-sh73a0.o
|
|
|
|
# Family
|
|
obj-$(CONFIG_CLK_RCAR_GEN2_CPG) += rcar-gen2-cpg.o
|
|
obj-$(CONFIG_CLK_RCAR_GEN3_CPG) += rcar-gen3-cpg.o
|
|
obj-$(CONFIG_CLK_RCAR_USB2_CLOCK_SEL) += rcar-usb2-clock-sel.o
|
|
|
|
# Generic
|
|
obj-$(CONFIG_CLK_RENESAS_CPG_MSSR) += renesas-cpg-mssr.o
|
|
obj-$(CONFIG_CLK_RENESAS_CPG_MSTP) += clk-mstp.o
|
|
obj-$(CONFIG_CLK_RENESAS_DIV6) += clk-div6.o
|