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Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
160 lines
4.2 KiB
C
160 lines
4.2 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2014 Samsung Electronics Co., Ltd.
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* Author: Tomasz Figa <t.figa@samsung.com>
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*
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* Clock driver for Exynos clock output
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*/
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#include <linux/slab.h>
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/syscore_ops.h>
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#define EXYNOS_CLKOUT_NR_CLKS 1
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#define EXYNOS_CLKOUT_PARENTS 32
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#define EXYNOS_PMU_DEBUG_REG 0xa00
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#define EXYNOS_CLKOUT_DISABLE_SHIFT 0
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#define EXYNOS_CLKOUT_MUX_SHIFT 8
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#define EXYNOS4_CLKOUT_MUX_MASK 0xf
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#define EXYNOS5_CLKOUT_MUX_MASK 0x1f
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struct exynos_clkout {
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struct clk_gate gate;
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struct clk_mux mux;
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spinlock_t slock;
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void __iomem *reg;
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u32 pmu_debug_save;
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struct clk_hw_onecell_data data;
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};
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static struct exynos_clkout *clkout;
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static int exynos_clkout_suspend(void)
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{
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clkout->pmu_debug_save = readl(clkout->reg + EXYNOS_PMU_DEBUG_REG);
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return 0;
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}
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static void exynos_clkout_resume(void)
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{
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writel(clkout->pmu_debug_save, clkout->reg + EXYNOS_PMU_DEBUG_REG);
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}
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static struct syscore_ops exynos_clkout_syscore_ops = {
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.suspend = exynos_clkout_suspend,
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.resume = exynos_clkout_resume,
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};
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static void __init exynos_clkout_init(struct device_node *node, u32 mux_mask)
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{
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const char *parent_names[EXYNOS_CLKOUT_PARENTS];
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struct clk *parents[EXYNOS_CLKOUT_PARENTS];
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int parent_count;
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int ret;
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int i;
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clkout = kzalloc(struct_size(clkout, data.hws, EXYNOS_CLKOUT_NR_CLKS),
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GFP_KERNEL);
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if (!clkout)
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return;
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spin_lock_init(&clkout->slock);
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parent_count = 0;
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for (i = 0; i < EXYNOS_CLKOUT_PARENTS; ++i) {
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char name[] = "clkoutXX";
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snprintf(name, sizeof(name), "clkout%d", i);
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parents[i] = of_clk_get_by_name(node, name);
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if (IS_ERR(parents[i])) {
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parent_names[i] = "none";
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continue;
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}
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parent_names[i] = __clk_get_name(parents[i]);
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parent_count = i + 1;
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}
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if (!parent_count)
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goto free_clkout;
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clkout->reg = of_iomap(node, 0);
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if (!clkout->reg)
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goto clks_put;
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clkout->gate.reg = clkout->reg + EXYNOS_PMU_DEBUG_REG;
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clkout->gate.bit_idx = EXYNOS_CLKOUT_DISABLE_SHIFT;
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clkout->gate.flags = CLK_GATE_SET_TO_DISABLE;
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clkout->gate.lock = &clkout->slock;
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clkout->mux.reg = clkout->reg + EXYNOS_PMU_DEBUG_REG;
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clkout->mux.mask = mux_mask;
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clkout->mux.shift = EXYNOS_CLKOUT_MUX_SHIFT;
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clkout->mux.lock = &clkout->slock;
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clkout->data.hws[0] = clk_hw_register_composite(NULL, "clkout",
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parent_names, parent_count, &clkout->mux.hw,
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&clk_mux_ops, NULL, NULL, &clkout->gate.hw,
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&clk_gate_ops, CLK_SET_RATE_PARENT
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| CLK_SET_RATE_NO_REPARENT);
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if (IS_ERR(clkout->data.hws[0]))
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goto err_unmap;
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clkout->data.num = EXYNOS_CLKOUT_NR_CLKS;
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ret = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, &clkout->data);
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if (ret)
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goto err_clk_unreg;
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register_syscore_ops(&exynos_clkout_syscore_ops);
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return;
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err_clk_unreg:
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clk_hw_unregister(clkout->data.hws[0]);
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err_unmap:
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iounmap(clkout->reg);
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clks_put:
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for (i = 0; i < EXYNOS_CLKOUT_PARENTS; ++i)
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if (!IS_ERR(parents[i]))
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clk_put(parents[i]);
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free_clkout:
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kfree(clkout);
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pr_err("%s: failed to register clkout clock\n", __func__);
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}
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/*
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* We use CLK_OF_DECLARE_DRIVER initialization method to avoid setting
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* the OF_POPULATED flag on the pmu device tree node, so later the
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* Exynos PMU platform device can be properly probed with PMU driver.
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*/
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static void __init exynos4_clkout_init(struct device_node *node)
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{
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exynos_clkout_init(node, EXYNOS4_CLKOUT_MUX_MASK);
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}
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CLK_OF_DECLARE_DRIVER(exynos4210_clkout, "samsung,exynos4210-pmu",
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exynos4_clkout_init);
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CLK_OF_DECLARE_DRIVER(exynos4412_clkout, "samsung,exynos4412-pmu",
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exynos4_clkout_init);
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CLK_OF_DECLARE_DRIVER(exynos3250_clkout, "samsung,exynos3250-pmu",
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exynos4_clkout_init);
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static void __init exynos5_clkout_init(struct device_node *node)
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{
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exynos_clkout_init(node, EXYNOS5_CLKOUT_MUX_MASK);
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}
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CLK_OF_DECLARE_DRIVER(exynos5250_clkout, "samsung,exynos5250-pmu",
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exynos5_clkout_init);
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CLK_OF_DECLARE_DRIVER(exynos5410_clkout, "samsung,exynos5410-pmu",
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exynos5_clkout_init);
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CLK_OF_DECLARE_DRIVER(exynos5420_clkout, "samsung,exynos5420-pmu",
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exynos5_clkout_init);
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CLK_OF_DECLARE_DRIVER(exynos5433_clkout, "samsung,exynos5433-pmu",
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exynos5_clkout_init);
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