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![Sugaya Taichi](/assets/img/avatar_default.png)
Aggregate common register accesses into shared functions for maintainability. Signed-off-by: Sugaya Taichi <sugaya.taichi@socionext.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
189 lines
5.1 KiB
C
189 lines
5.1 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2018 Socionext Inc.
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*/
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#include <linux/clk.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/irqreturn.h>
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#include <linux/sched_clock.h>
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#include "timer-of.h"
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#define MLB_TMR_TMCSR_OFS 0x0
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#define MLB_TMR_TMR_OFS 0x4
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#define MLB_TMR_TMRLR1_OFS 0x8
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#define MLB_TMR_TMRLR2_OFS 0xc
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#define MLB_TMR_REGSZPCH 0x10
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#define MLB_TMR_TMCSR_OUTL BIT(5)
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#define MLB_TMR_TMCSR_RELD BIT(4)
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#define MLB_TMR_TMCSR_INTE BIT(3)
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#define MLB_TMR_TMCSR_UF BIT(2)
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#define MLB_TMR_TMCSR_CNTE BIT(1)
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#define MLB_TMR_TMCSR_TRG BIT(0)
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#define MLB_TMR_TMCSR_CSL_DIV2 0
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#define MLB_TMR_DIV_CNT 2
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#define MLB_TMR_SRC_CH 1
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#define MLB_TMR_EVT_CH 0
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#define MLB_TMR_SRC_CH_OFS (MLB_TMR_REGSZPCH * MLB_TMR_SRC_CH)
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#define MLB_TMR_EVT_CH_OFS (MLB_TMR_REGSZPCH * MLB_TMR_EVT_CH)
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#define MLB_TMR_SRC_TMCSR_OFS (MLB_TMR_SRC_CH_OFS + MLB_TMR_TMCSR_OFS)
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#define MLB_TMR_SRC_TMR_OFS (MLB_TMR_SRC_CH_OFS + MLB_TMR_TMR_OFS)
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#define MLB_TMR_SRC_TMRLR1_OFS (MLB_TMR_SRC_CH_OFS + MLB_TMR_TMRLR1_OFS)
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#define MLB_TMR_SRC_TMRLR2_OFS (MLB_TMR_SRC_CH_OFS + MLB_TMR_TMRLR2_OFS)
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#define MLB_TMR_EVT_TMCSR_OFS (MLB_TMR_EVT_CH_OFS + MLB_TMR_TMCSR_OFS)
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#define MLB_TMR_EVT_TMR_OFS (MLB_TMR_EVT_CH_OFS + MLB_TMR_TMR_OFS)
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#define MLB_TMR_EVT_TMRLR1_OFS (MLB_TMR_EVT_CH_OFS + MLB_TMR_TMRLR1_OFS)
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#define MLB_TMR_EVT_TMRLR2_OFS (MLB_TMR_EVT_CH_OFS + MLB_TMR_TMRLR2_OFS)
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#define MLB_TIMER_RATING 500
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#define MLB_TIMER_ONESHOT 0
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#define MLB_TIMER_PERIODIC 1
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static irqreturn_t mlb_timer_interrupt(int irq, void *dev_id)
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{
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struct clock_event_device *clk = dev_id;
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struct timer_of *to = to_timer_of(clk);
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u32 val;
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val = readl_relaxed(timer_of_base(to) + MLB_TMR_EVT_TMCSR_OFS);
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val &= ~MLB_TMR_TMCSR_UF;
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writel_relaxed(val, timer_of_base(to) + MLB_TMR_EVT_TMCSR_OFS);
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clk->event_handler(clk);
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return IRQ_HANDLED;
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}
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static void mlb_evt_timer_start(struct timer_of *to, bool periodic)
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{
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u32 val = MLB_TMR_TMCSR_CSL_DIV2;
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val |= MLB_TMR_TMCSR_CNTE | MLB_TMR_TMCSR_TRG | MLB_TMR_TMCSR_INTE;
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if (periodic)
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val |= MLB_TMR_TMCSR_RELD;
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writel_relaxed(val, timer_of_base(to) + MLB_TMR_EVT_TMCSR_OFS);
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}
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static void mlb_evt_timer_stop(struct timer_of *to)
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{
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u32 val = readl_relaxed(timer_of_base(to) + MLB_TMR_EVT_TMCSR_OFS);
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val &= ~MLB_TMR_TMCSR_CNTE;
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writel_relaxed(val, timer_of_base(to) + MLB_TMR_EVT_TMCSR_OFS);
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}
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static void mlb_evt_timer_register_count(struct timer_of *to, unsigned long cnt)
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{
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writel_relaxed(cnt, timer_of_base(to) + MLB_TMR_EVT_TMRLR1_OFS);
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}
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static int mlb_set_state_periodic(struct clock_event_device *clk)
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{
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struct timer_of *to = to_timer_of(clk);
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mlb_evt_timer_stop(to);
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mlb_evt_timer_register_count(to, to->of_clk.period);
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mlb_evt_timer_start(to, MLB_TIMER_PERIODIC);
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return 0;
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}
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static int mlb_set_state_oneshot(struct clock_event_device *clk)
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{
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struct timer_of *to = to_timer_of(clk);
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mlb_evt_timer_stop(to);
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mlb_evt_timer_start(to, MLB_TIMER_ONESHOT);
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return 0;
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}
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static int mlb_set_state_shutdown(struct clock_event_device *clk)
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{
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struct timer_of *to = to_timer_of(clk);
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mlb_evt_timer_stop(to);
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return 0;
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}
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static int mlb_clkevt_next_event(unsigned long event,
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struct clock_event_device *clk)
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{
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struct timer_of *to = to_timer_of(clk);
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mlb_evt_timer_stop(to);
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mlb_evt_timer_register_count(to, event);
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mlb_evt_timer_start(to, MLB_TIMER_ONESHOT);
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return 0;
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}
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static int mlb_config_clock_source(struct timer_of *to)
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{
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u32 val = MLB_TMR_TMCSR_CSL_DIV2;
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writel_relaxed(val, timer_of_base(to) + MLB_TMR_SRC_TMCSR_OFS);
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writel_relaxed(~0, timer_of_base(to) + MLB_TMR_SRC_TMRLR1_OFS);
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writel_relaxed(~0, timer_of_base(to) + MLB_TMR_SRC_TMRLR2_OFS);
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val |= MLB_TMR_TMCSR_RELD | MLB_TMR_TMCSR_CNTE | MLB_TMR_TMCSR_TRG;
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writel_relaxed(val, timer_of_base(to) + MLB_TMR_SRC_TMCSR_OFS);
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return 0;
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}
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static int mlb_config_clock_event(struct timer_of *to)
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{
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writel_relaxed(0, timer_of_base(to) + MLB_TMR_EVT_TMCSR_OFS);
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return 0;
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}
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static struct timer_of to = {
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.flags = TIMER_OF_IRQ | TIMER_OF_BASE | TIMER_OF_CLOCK,
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.clkevt = {
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.name = "mlb-clkevt",
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.rating = MLB_TIMER_RATING,
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.cpumask = cpu_possible_mask,
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.features = CLOCK_EVT_FEAT_DYNIRQ | CLOCK_EVT_FEAT_ONESHOT,
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.set_state_oneshot = mlb_set_state_oneshot,
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.set_state_periodic = mlb_set_state_periodic,
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.set_state_shutdown = mlb_set_state_shutdown,
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.set_next_event = mlb_clkevt_next_event,
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},
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.of_irq = {
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.flags = IRQF_TIMER | IRQF_IRQPOLL,
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.handler = mlb_timer_interrupt,
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},
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};
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static u64 notrace mlb_timer_sched_read(void)
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{
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return ~readl_relaxed(timer_of_base(&to) + MLB_TMR_SRC_TMR_OFS);
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}
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static int __init mlb_timer_init(struct device_node *node)
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{
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int ret;
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unsigned long rate;
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ret = timer_of_init(node, &to);
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if (ret)
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return ret;
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rate = timer_of_rate(&to) / MLB_TMR_DIV_CNT;
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mlb_config_clock_source(&to);
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clocksource_mmio_init(timer_of_base(&to) + MLB_TMR_SRC_TMR_OFS,
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node->name, rate, MLB_TIMER_RATING, 32,
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clocksource_mmio_readl_down);
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sched_clock_register(mlb_timer_sched_read, 32, rate);
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mlb_config_clock_event(&to);
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clockevents_config_and_register(&to.clkevt, timer_of_rate(&to), 15,
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0xffffffff);
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return 0;
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}
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TIMER_OF_DECLARE(mlb_peritimer, "socionext,milbeaut-timer",
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mlb_timer_init);
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