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afcb7c07be
Now the clock ids are no more defined in private headers, cleanup and include the dt-bindings headers from the main driver file. Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Dmitry Rokosov <ddrokosov@sberdevices.ru> Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-17-38172d17c27a@linaro.org Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
28 lines
725 B
C
28 lines
725 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Amlogic A1 PLL Clock Controller internals
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*
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* Copyright (c) 2019 Amlogic, Inc. All rights reserved.
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* Author: Jian Hu <jian.hu@amlogic.com>
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*
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* Copyright (c) 2023, SberDevices. All Rights Reserved.
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* Author: Dmitry Rokosov <ddrokosov@sberdevices.ru>
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*/
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#ifndef __A1_PLL_H
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#define __A1_PLL_H
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#include "clk-pll.h"
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/* PLL register offset */
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#define ANACTRL_FIXPLL_CTRL0 0x0
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#define ANACTRL_FIXPLL_CTRL1 0x4
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#define ANACTRL_FIXPLL_STS 0x14
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#define ANACTRL_HIFIPLL_CTRL0 0xc0
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#define ANACTRL_HIFIPLL_CTRL1 0xc4
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#define ANACTRL_HIFIPLL_CTRL2 0xc8
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#define ANACTRL_HIFIPLL_CTRL3 0xcc
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#define ANACTRL_HIFIPLL_CTRL4 0xd0
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#define ANACTRL_HIFIPLL_STS 0xd4
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#endif /* __A1_PLL_H */
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