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2b6d37f6b7
The node names should be generic and SPI NOR dtschema expects "flash". Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220407143112.294930-2-krzysztof.kozlowski@linaro.org
88 lines
1.3 KiB
Text
88 lines
1.3 KiB
Text
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
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/*
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* IPQ6018 CP01 board device tree source
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*
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* Copyright (c) 2019, The Linux Foundation. All rights reserved.
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*/
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/dts-v1/;
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#include "ipq6018.dtsi"
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/ {
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model = "Qualcomm Technologies, Inc. IPQ6018/AP-CP01-C1";
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compatible = "qcom,ipq6018-cp01", "qcom,ipq6018";
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aliases {
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serial0 = &blsp1_uart3;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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bootargs-append = " swiotlb=1";
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};
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};
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&blsp1_uart3 {
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pinctrl-0 = <&serial_3_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&i2c_1 {
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pinctrl-0 = <&i2c_1_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&spi_0 {
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cs-select = <0>;
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status = "okay";
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flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0>;
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compatible = "n25q128a11";
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spi-max-frequency = <50000000>;
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};
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};
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&tlmm {
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i2c_1_pins: i2c-1-pins {
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pins = "gpio42", "gpio43";
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function = "blsp2_i2c";
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drive-strength = <8>;
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};
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spi_0_pins: spi-0-pins {
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pins = "gpio38", "gpio39", "gpio40", "gpio41";
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function = "blsp0_spi";
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drive-strength = <8>;
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bias-pull-down;
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};
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};
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&qpic_bam {
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status = "okay";
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};
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&qpic_nand {
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status = "okay";
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nand@0 {
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reg = <0>;
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nand-ecc-strength = <4>;
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nand-ecc-step-size = <512>;
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nand-bus-width = <8>;
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};
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};
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&qusb_phy_1 {
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status = "ok";
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};
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&usb2 {
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status = "ok";
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};
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