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0417a86b20
MSM DSI host driver actually parses "data-lanes" in DT and compare it with the number of DSI lanes the bridge driver sets for mipi_dsi_device. So we need to always specify "data-lanes" for the DSI host output. As of now, "data-lanes" is added to ti-sn65dsi86 dts fragment, but missing in parade-ps8640 dts fragment, which requires a fixup. Since we'll do 4-lane DSI regardless of which bridge chip is used, instead of adding "data-lanes" to parade-ps8640 dts fragment, let's just move "data-lanes" from the bridge dts to sc7180-trogdor.dtsi. Signed-off-by: Philip Chen <philipchen@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211029152647.v3.2.If23c83a786fc4d318a1986f43803f22b4b1d82cd@changeid
91 lines
1.6 KiB
Text
91 lines
1.6 KiB
Text
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Google Trogdor dts fragment for the boards with TI sn65dsi86 edp bridge
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*
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* Copyright 2021 Google LLC.
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*/
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#include <dt-bindings/gpio/gpio.h>
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&dsi0_out {
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remote-endpoint = <&sn65dsi86_in>;
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};
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edp_brij_i2c: &i2c2 {
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status = "okay";
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clock-frequency = <400000>;
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sn65dsi86_bridge: bridge@2d {
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compatible = "ti,sn65dsi86";
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reg = <0x2d>;
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pinctrl-names = "default";
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pinctrl-0 = <&edp_brij_en>, <&edp_brij_irq>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-parent = <&tlmm>;
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interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
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enable-gpios = <&tlmm 104 GPIO_ACTIVE_HIGH>;
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vpll-supply = <&pp1800_edp_vpll>;
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vccio-supply = <&pp1800_brij_vccio>;
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vcca-supply = <&pp1200_brij>;
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vcc-supply = <&pp1200_brij>;
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clocks = <&rpmhcc RPMH_LN_BB_CLK3>;
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clock-names = "refclk";
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no-hpd;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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sn65dsi86_in: endpoint {
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remote-endpoint = <&dsi0_out>;
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};
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};
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port@1 {
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reg = <1>;
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sn65dsi86_out: endpoint {
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data-lanes = <0 1>;
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remote-endpoint = <&panel_in_edp>;
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};
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};
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};
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aux-bus {
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panel: panel {
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/* Compatible will be filled in per-board */
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power-supply = <&pp3300_dx_edp>;
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backlight = <&backlight>;
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hpd-gpios = <&sn65dsi86_bridge 2 GPIO_ACTIVE_HIGH>;
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port {
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panel_in_edp: endpoint {
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remote-endpoint = <&sn65dsi86_out>;
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};
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};
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};
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};
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};
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};
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&tlmm {
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edp_brij_irq: edp-brij-irq {
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pinmux {
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pins = "gpio11";
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function = "gpio";
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};
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pinconf {
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pins = "gpio11";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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};
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