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cfd7bf66b2
Make sure the R-Car Gen3 SoC model present is documented in the comment header of each board DTS, on a single line. This makes it easier to identify boards that are available with different SoC or SiP options. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/251569665d7d4f4ed4bbab7267ce2ddccdef33e5.1626261816.git.geert+renesas@glider.be
37 lines
812 B
Text
37 lines
812 B
Text
// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree Source for the H3ULCB (R-Car Starter Kit Premier) board with R-Car H3 ES1.x
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*
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* Copyright (C) 2016 Renesas Electronics Corp.
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* Copyright (C) 2016 Cogent Embedded, Inc.
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*/
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/dts-v1/;
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#include "r8a77950.dtsi"
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#include "ulcb.dtsi"
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/ {
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model = "Renesas H3ULCB board based on r8a77950";
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compatible = "renesas,h3ulcb", "renesas,r8a7795";
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memory@48000000 {
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device_type = "memory";
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/* first 128MB is reserved for secure area. */
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reg = <0x0 0x48000000 0x0 0x38000000>;
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};
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memory@500000000 {
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device_type = "memory";
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reg = <0x5 0x00000000 0x0 0x40000000>;
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};
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memory@600000000 {
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device_type = "memory";
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reg = <0x6 0x00000000 0x0 0x40000000>;
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};
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memory@700000000 {
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device_type = "memory";
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reg = <0x7 0x00000000 0x0 0x40000000>;
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};
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};
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