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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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177cf6e52b
All the clocksource drivers's init function are now converted to return an error code. CLOCKSOURCE_OF_DECLARE is no longer used as well as the clksrc-of table. Let's convert back the names: - CLOCKSOURCE_OF_DECLARE_RET => CLOCKSOURCE_OF_DECLARE - clksrc-of-ret => clksrc-of Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> For exynos_mct and samsung_pwm_timer: Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> For arch/arc: Acked-by: Vineet Gupta <vgupta@synopsys.com> For mediatek driver: Acked-by: Matthias Brugger <matthias.bgg@gmail.com> For the Rockchip-part Acked-by: Heiko Stuebner <heiko@sntech.de> For STi : Acked-by: Patrice Chotard <patrice.chotard@st.com> For the mps2-timer.c and versatile.c changes: Acked-by: Liviu Dudau <Liviu.Dudau@arm.com> For the OXNAS part : Acked-by: Neil Armstrong <narmstrong@baylibre.com> For LPC32xx driver: Acked-by: Sylvain Lemieux <slemieux.tyco@gmail.com> For Broadcom Kona timer change: Acked-by: Ray Jui <ray.jui@broadcom.com> For Sun4i and Sun5i: Acked-by: Chen-Yu Tsai <wens@csie.org> For Meson6: Acked-by: Carlo Caione <carlo@caione.org> For Keystone: Acked-by: Santosh Shilimkar <ssantosh@kernel.org> For NPS: Acked-by: Noam Camus <noamca@mellanox.com> For bcm2835: Acked-by: Eric Anholt <eric@anholt.net>
85 lines
1.7 KiB
C
85 lines
1.7 KiB
C
/*
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* Copyright (C) Maxime Coquelin 2015
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* Author: Maxime Coquelin <mcoquelin.stm32@gmail.com>
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* License terms: GNU General Public License (GPL), version 2
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*/
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#include <linux/kernel.h>
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#include <linux/clocksource.h>
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#include <linux/clockchips.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/clk.h>
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#include <linux/bitops.h>
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#define SYST_CSR 0x00
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#define SYST_RVR 0x04
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#define SYST_CVR 0x08
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#define SYST_CALIB 0x0c
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#define SYST_CSR_ENABLE BIT(0)
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#define SYSTICK_LOAD_RELOAD_MASK 0x00FFFFFF
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static int __init system_timer_of_register(struct device_node *np)
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{
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struct clk *clk = NULL;
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void __iomem *base;
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u32 rate;
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int ret;
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base = of_iomap(np, 0);
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if (!base) {
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pr_warn("system-timer: invalid base address\n");
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return -ENXIO;
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}
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ret = of_property_read_u32(np, "clock-frequency", &rate);
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if (ret) {
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clk = of_clk_get(np, 0);
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if (IS_ERR(clk)) {
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ret = PTR_ERR(clk);
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goto out_unmap;
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}
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ret = clk_prepare_enable(clk);
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if (ret)
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goto out_clk_put;
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rate = clk_get_rate(clk);
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if (!rate) {
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ret = -EINVAL;
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goto out_clk_disable;
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}
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}
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writel_relaxed(SYSTICK_LOAD_RELOAD_MASK, base + SYST_RVR);
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writel_relaxed(SYST_CSR_ENABLE, base + SYST_CSR);
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ret = clocksource_mmio_init(base + SYST_CVR, "arm_system_timer", rate,
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200, 24, clocksource_mmio_readl_down);
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if (ret) {
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pr_err("failed to init clocksource (%d)\n", ret);
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if (clk)
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goto out_clk_disable;
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else
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goto out_unmap;
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}
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pr_info("ARM System timer initialized as clocksource\n");
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return 0;
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out_clk_disable:
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clk_disable_unprepare(clk);
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out_clk_put:
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clk_put(clk);
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out_unmap:
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iounmap(base);
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pr_warn("ARM System timer register failed (%d)\n", ret);
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return ret;
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}
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CLOCKSOURCE_OF_DECLARE(arm_systick, "arm,armv7m-systick",
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system_timer_of_register);
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