linux-stable/arch
Koen Vandeputte 17aa9d04ba ARM: cns3xxx: Fix writing to wrong PCI config registers after alignment
commit 65dbb423cf upstream.

Originally, cns3xxx used its own functions for mapping, reading and
writing config registers.

Commit 802b7c06ad ("ARM: cns3xxx: Convert PCI to use generic config
accessors") removed the internal PCI config write function in favor of
the generic one:

  cns3xxx_pci_write_config() --> pci_generic_config_write()

cns3xxx_pci_write_config() expected aligned addresses, being produced by
cns3xxx_pci_map_bus() while the generic one pci_generic_config_write()
actually expects the real address as both the function and hardware are
capable of byte-aligned writes.

This currently leads to pci_generic_config_write() writing to the wrong
registers.

For instance, upon ath9k module loading:

- driver ath9k gets loaded
- The driver wants to write value 0xA8 to register PCI_LATENCY_TIMER,
  located at 0x0D
- cns3xxx_pci_map_bus() aligns the address to 0x0C
- pci_generic_config_write() effectively writes 0xA8 into register 0x0C
  (CACHE_LINE_SIZE)

Fix the bug by removing the alignment in the cns3xxx mapping function.

Fixes: 802b7c06ad ("ARM: cns3xxx: Convert PCI to use generic config accessors")
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
[lorenzo.pieralisi@arm.com: updated commit log]
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Krzysztof Halasa <khalasa@piap.pl>
Acked-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
CC: stable@vger.kernel.org	# v4.0+
CC: Bjorn Helgaas <bhelgaas@google.com>
CC: Olof Johansson <olof@lixom.net>
CC: Robin Leblon <robin.leblon@ncentric.com>
CC: Rob Herring <robh@kernel.org>
CC: Russell King <linux@armlinux.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-02-06 17:31:34 +01:00
..
alpha arch/alpha, termios: implement BOTHER, IBSHIFT and termios2 2018-11-21 09:24:10 +01:00
arc ARC: perf: map generic branches to correct hardware condition 2019-01-31 08:13:43 +01:00
arm ARM: cns3xxx: Fix writing to wrong PCI config registers after alignment 2019-02-06 17:31:34 +01:00
arm64 arm64: Fix minor issues with the dcache_by_line_op macro 2019-01-26 09:37:03 +01:00
blackfin
c6x
cris bug.h: work around GCC PR82365 in BUG() 2018-05-30 07:52:00 +02:00
frv
h8300 h8300: remove extraneous __BIG_ENDIAN definition 2018-03-28 18:24:38 +02:00
hexagon hexagon: modify ffs() and fls() to return int 2018-10-10 08:54:25 +02:00
ia64 ia64/err-inject: Use get_user_pages_fast() 2018-05-30 07:52:11 +02:00
m32r m32r: fix endianness constraints 2018-02-28 10:19:44 +01:00
m68k m68k: fix "bad page state" oops on ColdFire boot 2018-08-24 13:09:11 +02:00
metag .gitignore: move *.dtb and *.dtb.S patterns to the top-level .gitignore 2018-02-13 10:19:46 +01:00
microblaze microblaze: Fix simpleImage format generation 2018-08-03 07:50:40 +02:00
mips MIPS: SiByte: Enable swiotlb for SWARM, LittleSur and BigSur 2019-01-26 09:37:01 +01:00
mn10300 mn10300/misalignment: Use SIGSEGV SEGV_MAPERR to report a failed user copy 2018-02-16 20:23:11 +01:00
nios2 .gitignore: move *.dtb and *.dtb.S patterns to the top-level .gitignore 2018-02-13 10:19:46 +01:00
openrisc openrisc: entry: Fix delay slot exception detection 2018-08-24 13:09:11 +02:00
parisc parisc: Fix exported address of os_hpmc handler 2018-11-13 11:14:46 -08:00
powerpc powerpc/xmon: Fix invocation inside lock region 2019-01-26 09:37:02 +01:00
s390 s390/smp: Fix calling smp_call_ipl_cpu() from ipl CPU 2019-01-31 08:13:47 +01:00
score
sh sh: fix build failure for J2 cpu with SMP disabled 2018-06-21 04:02:54 +09:00
sparc sparc64: Make proc_id signed. 2018-11-13 11:14:50 -08:00
tile
um um: Give start_idle_thread() a return code 2018-11-27 16:10:46 +01:00
unicore32 kmemcheck: stop using GFP_NOTRACK and SLAB_NOTRACK 2018-02-22 15:42:23 +01:00
x86 xen: Fix x86 sched_clock() interface for xen 2019-01-31 08:13:48 +01:00
xtensa xtensa: fix coprocessor part of ptrace_{get,set}xregs 2018-12-05 19:41:23 +01:00
.gitignore
Kconfig compiler.h: Allow arch-specific asm/compiler.h 2018-11-04 14:52:46 +01:00