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synced 2024-09-23 02:51:47 +00:00
17afa716e6
Put two extra configs into the device tree to handle the default configuration of the display reset signals on the HREFv60plus, move this over from the board file to the device tree. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
124 lines
3 KiB
Text
124 lines
3 KiB
Text
/*
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* Copyright 2012 ST-Ericsson AB
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#include "ste-dbx5x0.dtsi"
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#include "ste-href.dtsi"
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/ {
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model = "ST-Ericsson HREF (v60+) platform with Device Tree";
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compatible = "st-ericsson,hrefv60+", "st-ericsson,u8500";
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soc {
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// External Micro SD slot
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sdi0_per1@80126000 {
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arm,primecell-periphid = <0x10480180>;
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max-frequency = <100000000>;
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bus-width = <4>;
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mmc-cap-sd-highspeed;
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mmc-cap-mmc-highspeed;
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vmmc-supply = <&ab8500_ldo_aux3_reg>;
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cd-gpios = <&gpio2 31 0x4>; // 95
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status = "okay";
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};
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// WLAN SDIO channel
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sdi1_per2@80118000 {
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arm,primecell-periphid = <0x10480180>;
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max-frequency = <100000000>;
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bus-width = <4>;
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status = "okay";
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};
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// PoP:ed eMMC
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sdi2_per3@80005000 {
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arm,primecell-periphid = <0x10480180>;
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max-frequency = <100000000>;
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bus-width = <8>;
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mmc-cap-mmc-highspeed;
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status = "okay";
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};
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// On-board eMMC
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sdi4_per2@80114000 {
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arm,primecell-periphid = <0x10480180>;
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max-frequency = <100000000>;
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bus-width = <8>;
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mmc-cap-mmc-highspeed;
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vmmc-supply = <&ab8500_ldo_aux2_reg>;
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status = "okay";
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};
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pinctrl {
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/* Set this up using hogs */
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pinctrl-names = "default";
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pinctrl-0 = <&ipgpio_hrefv60_mode>;
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sdi0 {
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/* SD card detect GPIO pin, extend default state */
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sdi0_default_mode: sdi0_default {
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default_hrefv60_cfg1 {
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ste,pins = "GPIO95_E8";
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ste,config = <&gpio_in_pu>;
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};
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};
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};
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ipgpio {
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/*
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* XENON Flashgun on image processor GPIO (controlled from image
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* processor firmware), mux in these image processor GPIO lines 0
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* (XENON_FLASH_ID), 1 (XENON_READY) and there is an assistant
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* LED on IP GPIO 4 (XENON_EN2) on altfunction C, that need bias
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* from GPIO21 so pull up 0, 1 and drive 4 and GPIO21 low as output.
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*/
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ipgpio_hrefv60_mode: ipgpio_hrefv60 {
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hrefv60_mux {
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ste,function = "ipgpio";
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ste,pins = "ipgpio0_c_1", "ipgpio1_c_1", "ipgpio4_c_1";
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};
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hrefv60_cfg1 {
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ste,pins = "GPIO6_AF6", "GPIO7_AG5";
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ste,config = <&in_pu>;
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};
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hrefv60_cfg2 {
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ste,pins = "GPIO21_AB3";
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ste,config = <&gpio_out_lo>;
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};
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hrefv60_cfg3 {
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ste,pins = "GPIO64_F3";
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ste,config = <&out_lo>;
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};
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};
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};
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mcde {
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lcd_hrefv60_mode: lcd_hrefv60 {
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/*
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* Display Interface 1 uses GPIO 65 for RST (reset).
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* Display Interface 2 uses GPIO 66 for RST (reset).
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* Drive DISP1 reset high (not reset), driver DISP2 reset low (reset)
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*/
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hrefv60_cfg1 {
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ste,pins ="GPIO65_F1";
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ste,config = <&gpio_out_hi>;
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};
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hrefv60_cfg2 {
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ste,pins ="GPIO66_G3";
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ste,config = <&gpio_out_lo>;
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};
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};
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};
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};
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};
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};
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