mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-10-31 16:38:12 +00:00
152d32aa84
- Stage-2 isolation for the host kernel when running in protected mode - Guest SVE support when running in nVHE mode - Force W^X hypervisor mappings in nVHE mode - ITS save/restore for guests using direct injection with GICv4.1 - nVHE panics now produce readable backtraces - Guest support for PTP using the ptp_kvm driver - Performance improvements in the S2 fault handler x86: - Optimizations and cleanup of nested SVM code - AMD: Support for virtual SPEC_CTRL - Optimizations of the new MMU code: fast invalidation, zap under read lock, enable/disably dirty page logging under read lock - /dev/kvm API for AMD SEV live migration (guest API coming soon) - support SEV virtual machines sharing the same encryption context - support SGX in virtual machines - add a few more statistics - improved directed yield heuristics - Lots and lots of cleanups Generic: - Rework of MMU notifier interface, simplifying and optimizing the architecture-specific code - Some selftests improvements -----BEGIN PGP SIGNATURE----- iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmCJ13kUHHBib256aW5p QHJlZGhhdC5jb20ACgkQv/vSX3jHroM1HAgAqzPxEtiTPTFeFJV5cnPPJ3dFoFDK y/juZJUQ1AOtvuWzzwuf175ewkv9vfmtG6rVohpNSkUlJYeoc6tw7n8BTTzCVC1b c/4Dnrjeycr6cskYlzaPyV6MSgjSv5gfyj1LA5UEM16LDyekmaynosVWY5wJhju+ Bnyid8l8Utgz+TLLYogfQJQECCrsU0Wm//n+8TWQgLf1uuiwshU5JJe7b43diJrY +2DX+8p9yWXCTz62sCeDWNahUv8AbXpMeJ8uqZPYcN1P0gSEUGu8xKmLOFf9kR7b M4U1Gyz8QQbjd2lqnwiWIkvRLX6gyGVbq2zH0QbhUe5gg3qGUX7JjrhdDQ== =AXUi -----END PGP SIGNATURE----- Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm Pull kvm updates from Paolo Bonzini: "This is a large update by KVM standards, including AMD PSP (Platform Security Processor, aka "AMD Secure Technology") and ARM CoreSight (debug and trace) changes. ARM: - CoreSight: Add support for ETE and TRBE - Stage-2 isolation for the host kernel when running in protected mode - Guest SVE support when running in nVHE mode - Force W^X hypervisor mappings in nVHE mode - ITS save/restore for guests using direct injection with GICv4.1 - nVHE panics now produce readable backtraces - Guest support for PTP using the ptp_kvm driver - Performance improvements in the S2 fault handler x86: - AMD PSP driver changes - Optimizations and cleanup of nested SVM code - AMD: Support for virtual SPEC_CTRL - Optimizations of the new MMU code: fast invalidation, zap under read lock, enable/disably dirty page logging under read lock - /dev/kvm API for AMD SEV live migration (guest API coming soon) - support SEV virtual machines sharing the same encryption context - support SGX in virtual machines - add a few more statistics - improved directed yield heuristics - Lots and lots of cleanups Generic: - Rework of MMU notifier interface, simplifying and optimizing the architecture-specific code - a handful of "Get rid of oprofile leftovers" patches - Some selftests improvements" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (379 commits) KVM: selftests: Speed up set_memory_region_test selftests: kvm: Fix the check of return value KVM: x86: Take advantage of kvm_arch_dy_has_pending_interrupt() KVM: SVM: Skip SEV cache flush if no ASIDs have been used KVM: SVM: Remove an unnecessary prototype declaration of sev_flush_asids() KVM: SVM: Drop redundant svm_sev_enabled() helper KVM: SVM: Move SEV VMCB tracking allocation to sev.c KVM: SVM: Explicitly check max SEV ASID during sev_hardware_setup() KVM: SVM: Unconditionally invoke sev_hardware_teardown() KVM: SVM: Enable SEV/SEV-ES functionality by default (when supported) KVM: SVM: Condition sev_enabled and sev_es_enabled on CONFIG_KVM_AMD_SEV=y KVM: SVM: Append "_enabled" to module-scoped SEV/SEV-ES control variables KVM: SEV: Mask CPUID[0x8000001F].eax according to supported features KVM: SVM: Move SEV module params/variables to sev.c KVM: SVM: Disable SEV/SEV-ES if NPT is disabled KVM: SVM: Free sev_asid_bitmap during init if SEV setup fails KVM: SVM: Zero out the VMCB array used to track SEV ASID association x86/sev: Drop redundant and potentially misleading 'sev_enabled' KVM: x86: Move reverse CPUID helpers to separate header file KVM: x86: Rename GPR accessors to make mode-aware variants the defaults ...
160 lines
7.3 KiB
C
160 lines
7.3 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Based on arch/arm/kernel/asm-offsets.c
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*
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* Copyright (C) 1995-2003 Russell King
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* 2001-2002 Keith Owens
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* Copyright (C) 2012 ARM Ltd.
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*/
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#include <linux/arm_sdei.h>
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#include <linux/sched.h>
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#include <linux/mm.h>
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#include <linux/dma-mapping.h>
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#include <linux/kvm_host.h>
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#include <linux/preempt.h>
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#include <linux/suspend.h>
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#include <asm/cpufeature.h>
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#include <asm/fixmap.h>
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#include <asm/thread_info.h>
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#include <asm/memory.h>
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#include <asm/signal32.h>
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#include <asm/smp_plat.h>
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#include <asm/suspend.h>
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#include <linux/kbuild.h>
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#include <linux/arm-smccc.h>
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int main(void)
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{
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DEFINE(TSK_ACTIVE_MM, offsetof(struct task_struct, active_mm));
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BLANK();
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DEFINE(TSK_TI_FLAGS, offsetof(struct task_struct, thread_info.flags));
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DEFINE(TSK_TI_PREEMPT, offsetof(struct task_struct, thread_info.preempt_count));
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#ifdef CONFIG_ARM64_SW_TTBR0_PAN
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DEFINE(TSK_TI_TTBR0, offsetof(struct task_struct, thread_info.ttbr0));
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#endif
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#ifdef CONFIG_SHADOW_CALL_STACK
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DEFINE(TSK_TI_SCS_BASE, offsetof(struct task_struct, thread_info.scs_base));
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DEFINE(TSK_TI_SCS_SP, offsetof(struct task_struct, thread_info.scs_sp));
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#endif
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DEFINE(TSK_STACK, offsetof(struct task_struct, stack));
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#ifdef CONFIG_STACKPROTECTOR
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DEFINE(TSK_STACK_CANARY, offsetof(struct task_struct, stack_canary));
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#endif
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BLANK();
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DEFINE(THREAD_CPU_CONTEXT, offsetof(struct task_struct, thread.cpu_context));
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DEFINE(THREAD_SCTLR_USER, offsetof(struct task_struct, thread.sctlr_user));
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#ifdef CONFIG_ARM64_PTR_AUTH
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DEFINE(THREAD_KEYS_USER, offsetof(struct task_struct, thread.keys_user));
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DEFINE(THREAD_KEYS_KERNEL, offsetof(struct task_struct, thread.keys_kernel));
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#endif
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#ifdef CONFIG_ARM64_MTE
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DEFINE(THREAD_GCR_EL1_USER, offsetof(struct task_struct, thread.gcr_user_excl));
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#endif
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BLANK();
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DEFINE(S_X0, offsetof(struct pt_regs, regs[0]));
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DEFINE(S_X2, offsetof(struct pt_regs, regs[2]));
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DEFINE(S_X4, offsetof(struct pt_regs, regs[4]));
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DEFINE(S_X6, offsetof(struct pt_regs, regs[6]));
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DEFINE(S_X8, offsetof(struct pt_regs, regs[8]));
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DEFINE(S_X10, offsetof(struct pt_regs, regs[10]));
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DEFINE(S_X12, offsetof(struct pt_regs, regs[12]));
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DEFINE(S_X14, offsetof(struct pt_regs, regs[14]));
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DEFINE(S_X16, offsetof(struct pt_regs, regs[16]));
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DEFINE(S_X18, offsetof(struct pt_regs, regs[18]));
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DEFINE(S_X20, offsetof(struct pt_regs, regs[20]));
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DEFINE(S_X22, offsetof(struct pt_regs, regs[22]));
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DEFINE(S_X24, offsetof(struct pt_regs, regs[24]));
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DEFINE(S_X26, offsetof(struct pt_regs, regs[26]));
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DEFINE(S_X28, offsetof(struct pt_regs, regs[28]));
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DEFINE(S_FP, offsetof(struct pt_regs, regs[29]));
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DEFINE(S_LR, offsetof(struct pt_regs, regs[30]));
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DEFINE(S_SP, offsetof(struct pt_regs, sp));
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DEFINE(S_PSTATE, offsetof(struct pt_regs, pstate));
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DEFINE(S_PC, offsetof(struct pt_regs, pc));
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DEFINE(S_SYSCALLNO, offsetof(struct pt_regs, syscallno));
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DEFINE(S_SDEI_TTBR1, offsetof(struct pt_regs, sdei_ttbr1));
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DEFINE(S_PMR_SAVE, offsetof(struct pt_regs, pmr_save));
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DEFINE(S_STACKFRAME, offsetof(struct pt_regs, stackframe));
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DEFINE(PT_REGS_SIZE, sizeof(struct pt_regs));
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BLANK();
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#ifdef CONFIG_COMPAT
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DEFINE(COMPAT_SIGFRAME_REGS_OFFSET, offsetof(struct compat_sigframe, uc.uc_mcontext.arm_r0));
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DEFINE(COMPAT_RT_SIGFRAME_REGS_OFFSET, offsetof(struct compat_rt_sigframe, sig.uc.uc_mcontext.arm_r0));
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BLANK();
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#endif
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DEFINE(MM_CONTEXT_ID, offsetof(struct mm_struct, context.id.counter));
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BLANK();
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DEFINE(VMA_VM_MM, offsetof(struct vm_area_struct, vm_mm));
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DEFINE(VMA_VM_FLAGS, offsetof(struct vm_area_struct, vm_flags));
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BLANK();
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DEFINE(VM_EXEC, VM_EXEC);
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BLANK();
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DEFINE(PAGE_SZ, PAGE_SIZE);
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BLANK();
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DEFINE(DMA_TO_DEVICE, DMA_TO_DEVICE);
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DEFINE(DMA_FROM_DEVICE, DMA_FROM_DEVICE);
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BLANK();
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DEFINE(PREEMPT_DISABLE_OFFSET, PREEMPT_DISABLE_OFFSET);
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DEFINE(SOFTIRQ_SHIFT, SOFTIRQ_SHIFT);
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DEFINE(IRQ_CPUSTAT_SOFTIRQ_PENDING, offsetof(irq_cpustat_t, __softirq_pending));
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BLANK();
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DEFINE(CPU_BOOT_STACK, offsetof(struct secondary_data, stack));
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DEFINE(CPU_BOOT_TASK, offsetof(struct secondary_data, task));
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BLANK();
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DEFINE(FTR_OVR_VAL_OFFSET, offsetof(struct arm64_ftr_override, val));
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DEFINE(FTR_OVR_MASK_OFFSET, offsetof(struct arm64_ftr_override, mask));
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BLANK();
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#ifdef CONFIG_KVM
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DEFINE(VCPU_CONTEXT, offsetof(struct kvm_vcpu, arch.ctxt));
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DEFINE(VCPU_FAULT_DISR, offsetof(struct kvm_vcpu, arch.fault.disr_el1));
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DEFINE(VCPU_WORKAROUND_FLAGS, offsetof(struct kvm_vcpu, arch.workaround_flags));
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DEFINE(VCPU_HCR_EL2, offsetof(struct kvm_vcpu, arch.hcr_el2));
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DEFINE(CPU_USER_PT_REGS, offsetof(struct kvm_cpu_context, regs));
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DEFINE(CPU_APIAKEYLO_EL1, offsetof(struct kvm_cpu_context, sys_regs[APIAKEYLO_EL1]));
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DEFINE(CPU_APIBKEYLO_EL1, offsetof(struct kvm_cpu_context, sys_regs[APIBKEYLO_EL1]));
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DEFINE(CPU_APDAKEYLO_EL1, offsetof(struct kvm_cpu_context, sys_regs[APDAKEYLO_EL1]));
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DEFINE(CPU_APDBKEYLO_EL1, offsetof(struct kvm_cpu_context, sys_regs[APDBKEYLO_EL1]));
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DEFINE(CPU_APGAKEYLO_EL1, offsetof(struct kvm_cpu_context, sys_regs[APGAKEYLO_EL1]));
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DEFINE(HOST_CONTEXT_VCPU, offsetof(struct kvm_cpu_context, __hyp_running_vcpu));
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DEFINE(HOST_DATA_CONTEXT, offsetof(struct kvm_host_data, host_ctxt));
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DEFINE(NVHE_INIT_MAIR_EL2, offsetof(struct kvm_nvhe_init_params, mair_el2));
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DEFINE(NVHE_INIT_TCR_EL2, offsetof(struct kvm_nvhe_init_params, tcr_el2));
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DEFINE(NVHE_INIT_TPIDR_EL2, offsetof(struct kvm_nvhe_init_params, tpidr_el2));
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DEFINE(NVHE_INIT_STACK_HYP_VA, offsetof(struct kvm_nvhe_init_params, stack_hyp_va));
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DEFINE(NVHE_INIT_PGD_PA, offsetof(struct kvm_nvhe_init_params, pgd_pa));
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DEFINE(NVHE_INIT_HCR_EL2, offsetof(struct kvm_nvhe_init_params, hcr_el2));
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DEFINE(NVHE_INIT_VTTBR, offsetof(struct kvm_nvhe_init_params, vttbr));
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DEFINE(NVHE_INIT_VTCR, offsetof(struct kvm_nvhe_init_params, vtcr));
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#endif
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#ifdef CONFIG_CPU_PM
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DEFINE(CPU_CTX_SP, offsetof(struct cpu_suspend_ctx, sp));
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DEFINE(MPIDR_HASH_MASK, offsetof(struct mpidr_hash, mask));
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DEFINE(MPIDR_HASH_SHIFTS, offsetof(struct mpidr_hash, shift_aff));
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DEFINE(SLEEP_STACK_DATA_SYSTEM_REGS, offsetof(struct sleep_stack_data, system_regs));
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DEFINE(SLEEP_STACK_DATA_CALLEE_REGS, offsetof(struct sleep_stack_data, callee_saved_regs));
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#endif
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DEFINE(ARM_SMCCC_RES_X0_OFFS, offsetof(struct arm_smccc_res, a0));
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DEFINE(ARM_SMCCC_RES_X2_OFFS, offsetof(struct arm_smccc_res, a2));
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DEFINE(ARM_SMCCC_QUIRK_ID_OFFS, offsetof(struct arm_smccc_quirk, id));
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DEFINE(ARM_SMCCC_QUIRK_STATE_OFFS, offsetof(struct arm_smccc_quirk, state));
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BLANK();
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DEFINE(HIBERN_PBE_ORIG, offsetof(struct pbe, orig_address));
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DEFINE(HIBERN_PBE_ADDR, offsetof(struct pbe, address));
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DEFINE(HIBERN_PBE_NEXT, offsetof(struct pbe, next));
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DEFINE(ARM64_FTR_SYSVAL, offsetof(struct arm64_ftr_reg, sys_val));
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BLANK();
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#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
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DEFINE(TRAMP_VALIAS, TRAMP_VALIAS);
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#endif
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#ifdef CONFIG_ARM_SDE_INTERFACE
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DEFINE(SDEI_EVENT_INTREGS, offsetof(struct sdei_registered_event, interrupted_regs));
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DEFINE(SDEI_EVENT_PRIORITY, offsetof(struct sdei_registered_event, priority));
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#endif
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#ifdef CONFIG_ARM64_PTR_AUTH
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DEFINE(PTRAUTH_USER_KEY_APIA, offsetof(struct ptrauth_keys_user, apia));
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DEFINE(PTRAUTH_KERNEL_KEY_APIA, offsetof(struct ptrauth_keys_kernel, apia));
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BLANK();
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#endif
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return 0;
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}
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