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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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278432084b
Using a dynamic allocation to store a single pointer is not very efficient/useful. Worse, the memory is released in the SoundWire stream.c file, but still accessed in the DAI shutdown, leading to kmemleak reports. And last the API requires the previous stream information to be cleared when the argument is NULL. Simplify the code to address all 3 problems. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Reviewed-by: Péter Ujfalusi <peter.ujfalusi@linux.intel.com> Reviewed-by: Rander Wang <rander.wang@intel.com> Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com> Link: https://lore.kernel.org/r/20230324014408.1677505-11-yung-chuan.liao@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
216 lines
6.3 KiB
C
216 lines
6.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* rt712-sdca.h -- RT712 SDCA ALSA SoC audio driver header
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*
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* Copyright(c) 2023 Realtek Semiconductor Corp.
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*/
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#ifndef __RT712_H__
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#define __RT712_H__
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#include <linux/pm.h>
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#include <linux/regmap.h>
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#include <linux/soundwire/sdw.h>
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#include <linux/soundwire/sdw_type.h>
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#include <sound/soc.h>
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#include <linux/workqueue.h>
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struct rt712_sdca_priv {
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struct regmap *regmap;
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struct regmap *mbq_regmap;
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struct snd_soc_component *component;
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struct sdw_slave *slave;
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enum sdw_slave_status status;
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struct sdw_bus_params params;
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bool hw_init;
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bool first_hw_init;
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struct snd_soc_jack *hs_jack;
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struct delayed_work jack_detect_work;
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struct delayed_work jack_btn_check_work;
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struct mutex calibrate_mutex; /* for headset calibration */
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struct mutex disable_irq_lock; /* SDCA irq lock protection */
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bool disable_irq;
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int jack_type;
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int jd_src;
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unsigned int scp_sdca_stat1;
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unsigned int scp_sdca_stat2;
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unsigned int hw_id;
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bool fu0f_dapm_mute;
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bool fu0f_mixer_l_mute;
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bool fu0f_mixer_r_mute;
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};
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/* NID */
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#define RT712_VENDOR_REG 0x20
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#define RT712_VENDOR_CALI 0x58
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#define RT712_ULTRA_SOUND_DET 0x59
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#define RT712_VENDOR_IMS_DRE 0x5b
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#define RT712_VENDOR_ANALOG_CTL 0x5f
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#define RT712_VENDOR_HDA_CTL 0x61
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/* Index (NID:20h) */
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#define RT712_JD_PRODUCT_NUM 0x00
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#define RT712_ANALOG_BIAS_CTL3 0x04
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#define RT712_LDO2_3_CTL1 0x0e
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#define RT712_PARA_VERB_CTL 0x1a
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#define RT712_CC_DET1 0x24
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#define RT712_COMBO_JACK_AUTO_CTL1 0x45
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#define RT712_COMBO_JACK_AUTO_CTL2 0x46
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#define RT712_COMBO_JACK_AUTO_CTL3 0x47
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#define RT712_DIGITAL_MISC_CTRL4 0x4a
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#define RT712_FSM_CTL 0x67
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#define RT712_SW_CONFIG1 0x8a
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#define RT712_SW_CONFIG2 0x8b
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/* Index (NID:58h) */
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#define RT712_DAC_DC_CALI_CTL1 0x00
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#define RT712_DAC_DC_CALI_CTL2 0x01
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/* Index (NID:59h) */
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#define RT712_ULTRA_SOUND_DETECTOR6 0x1e
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/* Index (NID:5bh) */
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#define RT712_IMS_DIGITAL_CTL1 0x00
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#define RT712_IMS_DIGITAL_CTL5 0x05
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#define RT712_HP_DETECT_RLDET_CTL1 0x29
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#define RT712_HP_DETECT_RLDET_CTL2 0x2a
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/* Index (NID:5fh) */
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#define RT712_MISC_POWER_CTL0 0x00
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#define RT712_MISC_POWER_CTL7 0x08
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/* Index (NID:61h) */
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#define RT712_HDA_LEGACY_MUX_CTL0 0x00
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#define RT712_HDA_LEGACY_CONFIG_CTL0 0x06
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#define RT712_HDA_LEGACY_RESET_CTL 0x08
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#define RT712_HDA_LEGACY_GPIO_WAKE_EN_CTL 0x0e
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#define RT712_DMIC_ENT_FLOAT_CTL 0x10
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#define RT712_DMIC_GAIN_ENT_FLOAT_CTL0 0x11
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#define RT712_DMIC_GAIN_ENT_FLOAT_CTL2 0x13
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#define RT712_ADC_ENT_FLOAT_CTL 0x15
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#define RT712_ADC_VOL_CH_FLOAT_CTL2 0x18
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#define RT712_DAC03_HP_PDE_FLOAT_CTL 0x22
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#define RT712_MIC2_LINE2_PDE_FLOAT_CTL 0x23
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#define RT712_ADC0A_08_PDE_FLOAT_CTL 0x26
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#define RT712_ADC0B_11_PDE_FLOAT_CTL 0x27
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#define RT712_DMIC1_2_PDE_FLOAT_CTL 0x2b
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#define RT712_AMP_PDE_FLOAT_CTL 0x2c
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#define RT712_I2S_IN_OUT_PDE_FLOAT_CTL 0x2f
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#define RT712_GE_RELATED_CTL1 0x45
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#define RT712_GE_RELATED_CTL2 0x46
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#define RT712_MIXER_CTL0 0x52
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#define RT712_MIXER_CTL1 0x53
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#define RT712_EAPD_CTL 0x55
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#define RT712_UMP_HID_CTL0 0x60
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#define RT712_UMP_HID_CTL1 0x61
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#define RT712_UMP_HID_CTL2 0x62
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#define RT712_UMP_HID_CTL3 0x63
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#define RT712_UMP_HID_CTL4 0x64
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#define RT712_UMP_HID_CTL5 0x65
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#define RT712_UMP_HID_CTL6 0x66
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#define RT712_UMP_HID_CTL7 0x67
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#define RT712_UMP_HID_CTL8 0x68
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/* Parameter & Verb control 01 (0x1a)(NID:20h) */
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#define RT712_HIDDEN_REG_SW_RESET (0x1 << 14)
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/* combo jack auto switch control 2 (0x46)(NID:20h) */
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#define RT712_COMBOJACK_AUTO_DET_STATUS (0x1 << 11)
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#define RT712_COMBOJACK_AUTO_DET_TRS (0x1 << 10)
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#define RT712_COMBOJACK_AUTO_DET_CTIA (0x1 << 9)
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#define RT712_COMBOJACK_AUTO_DET_OMTP (0x1 << 8)
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/* DAC DC offset calibration control-1 (0x00)(NID:58h) */
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#define RT712_DAC_DC_CALI_TRIGGER (0x1 << 15)
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#define RT712_EAPD_HIGH 0x2
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#define RT712_EAPD_LOW 0x0
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/* RC Calibration register */
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#define RT712_RC_CAL 0x3201
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/* Buffer address for HID */
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#define RT712_BUF_ADDR_HID1 0x44030000
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#define RT712_BUF_ADDR_HID2 0x44030020
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/* RT712 SDCA Control - function number */
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#define FUNC_NUM_JACK_CODEC 0x01
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#define FUNC_NUM_MIC_ARRAY 0x02
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#define FUNC_NUM_HID 0x03
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#define FUNC_NUM_AMP 0x04
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/* RT712 SDCA entity */
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#define RT712_SDCA_ENT_HID01 0x01
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#define RT712_SDCA_ENT_GE49 0x49
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#define RT712_SDCA_ENT_USER_FU05 0x05
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#define RT712_SDCA_ENT_USER_FU06 0x06
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#define RT712_SDCA_ENT_USER_FU0F 0x0f
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#define RT712_SDCA_ENT_USER_FU10 0x19
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#define RT712_SDCA_ENT_USER_FU1E 0x1e
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#define RT712_SDCA_ENT_FU15 0x15
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#define RT712_SDCA_ENT_PDE23 0x23
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#define RT712_SDCA_ENT_PDE40 0x40
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#define RT712_SDCA_ENT_PDE11 0x11
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#define RT712_SDCA_ENT_PDE12 0x12
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#define RT712_SDCA_ENT_CS01 0x01
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#define RT712_SDCA_ENT_CS11 0x11
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#define RT712_SDCA_ENT_CS1F 0x1f
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#define RT712_SDCA_ENT_CS1C 0x1c
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#define RT712_SDCA_ENT_CS31 0x31
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#define RT712_SDCA_ENT_OT23 0x42
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#define RT712_SDCA_ENT_IT26 0x26
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#define RT712_SDCA_ENT_IT09 0x09
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#define RT712_SDCA_ENT_PLATFORM_FU15 0x15
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#define RT712_SDCA_ENT_PLATFORM_FU44 0x44
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/* RT712 SDCA control */
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#define RT712_SDCA_CTL_SAMPLE_FREQ_INDEX 0x10
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#define RT712_SDCA_CTL_FU_MUTE 0x01
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#define RT712_SDCA_CTL_FU_VOLUME 0x02
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#define RT712_SDCA_CTL_HIDTX_CURRENT_OWNER 0x10
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#define RT712_SDCA_CTL_HIDTX_SET_OWNER_TO_DEVICE 0x11
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#define RT712_SDCA_CTL_HIDTX_MESSAGE_OFFSET 0x12
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#define RT712_SDCA_CTL_HIDTX_MESSAGE_LENGTH 0x13
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#define RT712_SDCA_CTL_SELECTED_MODE 0x01
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#define RT712_SDCA_CTL_DETECTED_MODE 0x02
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#define RT712_SDCA_CTL_REQ_POWER_STATE 0x01
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#define RT712_SDCA_CTL_VENDOR_DEF 0x30
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#define RT712_SDCA_CTL_FU_CH_GAIN 0x0b
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/* RT712 SDCA channel */
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#define CH_L 0x01
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#define CH_R 0x02
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/* sample frequency index */
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#define RT712_SDCA_RATE_16000HZ 0x04
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#define RT712_SDCA_RATE_32000HZ 0x07
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#define RT712_SDCA_RATE_44100HZ 0x08
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#define RT712_SDCA_RATE_48000HZ 0x09
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#define RT712_SDCA_RATE_96000HZ 0x0b
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#define RT712_SDCA_RATE_192000HZ 0x0d
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enum {
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RT712_AIF1,
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RT712_AIF2,
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};
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enum rt712_sdca_jd_src {
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RT712_JD_NULL,
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RT712_JD1,
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};
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enum rt712_sdca_hw_id {
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RT712_DEV_ID_712 = 0x7,
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RT712_DEV_ID_713 = 0x6,
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RT712_DEV_ID_716 = 0x5,
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RT712_DEV_ID_717 = 0x4,
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};
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#define RT712_PART_ID_713 0x713
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int rt712_sdca_io_init(struct device *dev, struct sdw_slave *slave);
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int rt712_sdca_init(struct device *dev, struct regmap *regmap,
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struct regmap *mbq_regmap, struct sdw_slave *slave);
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int rt712_sdca_jack_detect(struct rt712_sdca_priv *rt712, bool *hp, bool *mic);
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#endif /* __RT712_H__ */
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