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![Alan Cox](/assets/img/avatar_default.png)
Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
844 lines
26 KiB
C
844 lines
26 KiB
C
/*
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* sym53c416.c
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* Low-level SCSI driver for sym53c416 chip.
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* Copyright (C) 1998 Lieven Willems (lw_linux@hotmail.com)
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*
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* Changes :
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*
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* Marcelo Tosatti <marcelo@conectiva.com.br> : Added io_request_lock locking
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* Alan Cox <alan@lxorguk.ukuu.org.uk> : Cleaned up code formatting
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* Fixed an irq locking bug
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* Added ISAPnP support
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* Bjoern A. Zeeb <bzeeb@zabbadoz.net> : Initial irq locking updates
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* Added another card with ISAPnP support
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*
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* LILO command line usage: sym53c416=<PORTBASE>[,<IRQ>]
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2, or (at your option) any
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* later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/string.h>
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#include <linux/ioport.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <linux/proc_fs.h>
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#include <linux/spinlock.h>
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#include <asm/dma.h>
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#include <asm/system.h>
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#include <asm/io.h>
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#include <linux/blkdev.h>
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#include <linux/isapnp.h>
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#include "scsi.h"
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#include <scsi/scsi_host.h>
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#include "sym53c416.h"
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#define VERSION_STRING "Version 1.0.0-ac"
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#define TC_LOW 0x00 /* Transfer counter low */
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#define TC_MID 0x01 /* Transfer counter mid */
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#define SCSI_FIFO 0x02 /* SCSI FIFO register */
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#define COMMAND_REG 0x03 /* Command Register */
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#define STATUS_REG 0x04 /* Status Register (READ) */
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#define DEST_BUS_ID 0x04 /* Destination Bus ID (WRITE) */
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#define INT_REG 0x05 /* Interrupt Register (READ) */
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#define TOM 0x05 /* Time out multiplier (WRITE) */
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#define STP 0x06 /* Synchronous Transfer period */
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#define SYNC_OFFSET 0x07 /* Synchronous Offset */
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#define CONF_REG_1 0x08 /* Configuration register 1 */
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#define CONF_REG_2 0x0B /* Configuration register 2 */
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#define CONF_REG_3 0x0C /* Configuration register 3 */
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#define CONF_REG_4 0x0D /* Configuration register 4 */
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#define TC_HIGH 0x0E /* Transfer counter high */
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#define PIO_FIFO_1 0x10 /* PIO FIFO register 1 */
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#define PIO_FIFO_2 0x11 /* PIO FIFO register 2 */
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#define PIO_FIFO_3 0x12 /* PIO FIFO register 3 */
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#define PIO_FIFO_4 0x13 /* PIO FIFO register 4 */
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#define PIO_FIFO_CNT 0x14 /* PIO FIFO count */
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#define PIO_INT_REG 0x15 /* PIO interrupt register */
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#define CONF_REG_5 0x16 /* Configuration register 5 */
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#define FEATURE_EN 0x1D /* Feature Enable register */
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/* Configuration register 1 entries: */
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/* Bits 2-0: SCSI ID of host adapter */
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#define SCM 0x80 /* Slow Cable Mode */
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#define SRID 0x40 /* SCSI Reset Interrupt Disable */
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#define PTM 0x20 /* Parity Test Mode */
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#define EPC 0x10 /* Enable Parity Checking */
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#define CTME 0x08 /* Special Test Mode */
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/* Configuration register 2 entries: */
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#define FE 0x40 /* Features Enable */
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#define SCSI2 0x08 /* SCSI 2 Enable */
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#define TBPA 0x04 /* Target Bad Parity Abort */
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/* Configuration register 3 entries: */
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#define IDMRC 0x80 /* ID Message Reserved Check */
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#define QTE 0x40 /* Queue Tag Enable */
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#define CDB10 0x20 /* Command Descriptor Block 10 */
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#define FSCSI 0x10 /* FastSCSI */
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#define FCLK 0x08 /* FastClock */
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/* Configuration register 4 entries: */
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#define RBS 0x08 /* Register bank select */
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#define EAN 0x04 /* Enable Active Negotiation */
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/* Configuration register 5 entries: */
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#define LPSR 0x80 /* Lower Power SCSI Reset */
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#define IE 0x20 /* Interrupt Enable */
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#define LPM 0x02 /* Low Power Mode */
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#define WSE0 0x01 /* 0WS Enable */
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/* Interrupt register entries: */
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#define SRST 0x80 /* SCSI Reset */
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#define ILCMD 0x40 /* Illegal Command */
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#define DIS 0x20 /* Disconnect */
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#define BS 0x10 /* Bus Service */
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#define FC 0x08 /* Function Complete */
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#define RESEL 0x04 /* Reselected */
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#define SI 0x03 /* Selection Interrupt */
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/* Status Register Entries: */
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#define SCI 0x80 /* SCSI Core Int */
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#define GE 0x40 /* Gross Error */
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#define PE 0x20 /* Parity Error */
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#define TC 0x10 /* Terminal Count */
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#define VGC 0x08 /* Valid Group Code */
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#define PHBITS 0x07 /* Phase bits */
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/* PIO Interrupt Register Entries: */
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#define SCI 0x80 /* SCSI Core Int */
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#define PFI 0x40 /* PIO FIFO Interrupt */
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#define FULL 0x20 /* PIO FIFO Full */
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#define EMPTY 0x10 /* PIO FIFO Empty */
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#define CE 0x08 /* Collision Error */
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#define OUE 0x04 /* Overflow / Underflow error */
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#define FIE 0x02 /* Full Interrupt Enable */
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#define EIE 0x01 /* Empty Interrupt Enable */
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/* SYM53C416 SCSI phases (lower 3 bits of SYM53C416_STATUS_REG) */
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#define PHASE_DATA_OUT 0x00
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#define PHASE_DATA_IN 0x01
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#define PHASE_COMMAND 0x02
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#define PHASE_STATUS 0x03
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#define PHASE_RESERVED_1 0x04
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#define PHASE_RESERVED_2 0x05
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#define PHASE_MESSAGE_OUT 0x06
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#define PHASE_MESSAGE_IN 0x07
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/* SYM53C416 core commands */
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#define NOOP 0x00
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#define FLUSH_FIFO 0x01
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#define RESET_CHIP 0x02
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#define RESET_SCSI_BUS 0x03
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#define DISABLE_SEL_RESEL 0x45
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#define RESEL_SEQ 0x40
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#define SEL_WITHOUT_ATN_SEQ 0x41
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#define SEL_WITH_ATN_SEQ 0x42
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#define SEL_WITH_ATN_AND_STOP_SEQ 0x43
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#define ENABLE_SEL_RESEL 0x44
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#define SEL_WITH_ATN3_SEQ 0x46
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#define RESEL3_SEQ 0x47
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#define SND_MSG 0x20
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#define SND_STAT 0x21
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#define SND_DATA 0x22
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#define DISCONNECT_SEQ 0x23
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#define TERMINATE_SEQ 0x24
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#define TARGET_COMM_COMPLETE_SEQ 0x25
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#define DISCONN 0x27
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#define RECV_MSG_SEQ 0x28
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#define RECV_CMD 0x29
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#define RECV_DATA 0x2A
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#define RECV_CMD_SEQ 0x2B
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#define TARGET_ABORT_PIO 0x04
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#define TRANSFER_INFORMATION 0x10
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#define INIT_COMM_COMPLETE_SEQ 0x11
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#define MSG_ACCEPTED 0x12
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#define TRANSFER_PAD 0x18
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#define SET_ATN 0x1A
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#define RESET_ATN 0x1B
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#define ILLEGAL 0xFF
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#define PIO_MODE 0x80
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#define IO_RANGE 0x20 /* 0x00 - 0x1F */
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#define ID "sym53c416" /* Attention: copied to the sym53c416.h */
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#define PIO_SIZE 128 /* Size of PIO fifo is 128 bytes */
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#define READ_TIMEOUT 150
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#define WRITE_TIMEOUT 150
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#ifdef MODULE
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#define sym53c416_base sym53c416
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#define sym53c416_base_1 sym53c416_1
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#define sym53c416_base_2 sym53c416_2
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#define sym53c416_base_3 sym53c416_3
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static unsigned int sym53c416_base[2];
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static unsigned int sym53c416_base_1[2];
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static unsigned int sym53c416_base_2[2];
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static unsigned int sym53c416_base_3[2];
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#endif
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#define MAXHOSTS 4
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#define SG_ADDRESS(buffer) ((char *) sg_virt((buffer)))
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enum phases
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{
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idle,
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data_out,
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data_in,
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command_ph,
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status_ph,
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message_out,
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message_in
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};
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typedef struct
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{
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int base;
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int irq;
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int scsi_id;
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} host;
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static host hosts[MAXHOSTS] = {
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{0, 0, SYM53C416_SCSI_ID},
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{0, 0, SYM53C416_SCSI_ID},
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{0, 0, SYM53C416_SCSI_ID},
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{0, 0, SYM53C416_SCSI_ID}
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};
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static int host_index = 0;
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static char info[120];
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static Scsi_Cmnd *current_command = NULL;
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static int fastpio = 1;
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static int probeaddrs[] = {0x200, 0x220, 0x240, 0};
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static void sym53c416_set_transfer_counter(int base, unsigned int len)
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{
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/* Program Transfer Counter */
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outb(len & 0x0000FF, base + TC_LOW);
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outb((len & 0x00FF00) >> 8, base + TC_MID);
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outb((len & 0xFF0000) >> 16, base + TC_HIGH);
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}
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static DEFINE_SPINLOCK(sym53c416_lock);
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/* Returns the number of bytes read */
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static __inline__ unsigned int sym53c416_read(int base, unsigned char *buffer, unsigned int len)
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{
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unsigned int orig_len = len;
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unsigned long flags = 0;
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unsigned int bytes_left;
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unsigned long i;
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int timeout = READ_TIMEOUT;
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/* Do transfer */
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spin_lock_irqsave(&sym53c416_lock, flags);
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while(len && timeout)
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{
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bytes_left = inb(base + PIO_FIFO_CNT); /* Number of bytes in the PIO FIFO */
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if(fastpio && bytes_left > 3)
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{
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insl(base + PIO_FIFO_1, buffer, bytes_left >> 2);
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buffer += bytes_left & 0xFC;
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len -= bytes_left & 0xFC;
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}
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else if(bytes_left > 0)
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{
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len -= bytes_left;
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for(; bytes_left > 0; bytes_left--)
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*(buffer++) = inb(base + PIO_FIFO_1);
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}
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else
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{
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i = jiffies + timeout;
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spin_unlock_irqrestore(&sym53c416_lock, flags);
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while(time_before(jiffies, i) && (inb(base + PIO_INT_REG) & EMPTY) && timeout)
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if(inb(base + PIO_INT_REG) & SCI)
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timeout = 0;
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spin_lock_irqsave(&sym53c416_lock, flags);
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if(inb(base + PIO_INT_REG) & EMPTY)
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timeout = 0;
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}
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}
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spin_unlock_irqrestore(&sym53c416_lock, flags);
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return orig_len - len;
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}
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/* Returns the number of bytes written */
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static __inline__ unsigned int sym53c416_write(int base, unsigned char *buffer, unsigned int len)
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{
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unsigned int orig_len = len;
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unsigned long flags = 0;
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unsigned int bufferfree;
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unsigned long i;
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unsigned int timeout = WRITE_TIMEOUT;
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/* Do transfer */
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spin_lock_irqsave(&sym53c416_lock, flags);
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while(len && timeout)
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{
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bufferfree = PIO_SIZE - inb(base + PIO_FIFO_CNT);
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if(bufferfree > len)
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bufferfree = len;
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if(fastpio && bufferfree > 3)
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{
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outsl(base + PIO_FIFO_1, buffer, bufferfree >> 2);
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buffer += bufferfree & 0xFC;
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len -= bufferfree & 0xFC;
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}
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else if(bufferfree > 0)
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{
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len -= bufferfree;
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for(; bufferfree > 0; bufferfree--)
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outb(*(buffer++), base + PIO_FIFO_1);
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}
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else
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{
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i = jiffies + timeout;
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spin_unlock_irqrestore(&sym53c416_lock, flags);
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while(time_before(jiffies, i) && (inb(base + PIO_INT_REG) & FULL) && timeout)
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;
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spin_lock_irqsave(&sym53c416_lock, flags);
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if(inb(base + PIO_INT_REG) & FULL)
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timeout = 0;
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}
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}
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spin_unlock_irqrestore(&sym53c416_lock, flags);
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return orig_len - len;
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}
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static irqreturn_t sym53c416_intr_handle(int irq, void *dev_id)
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{
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struct Scsi_Host *dev = dev_id;
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int base = dev->io_port;
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int i;
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unsigned long flags = 0;
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unsigned char status_reg, pio_int_reg, int_reg;
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struct scatterlist *sg;
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unsigned int tot_trans = 0;
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spin_lock_irqsave(dev->host_lock,flags);
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status_reg = inb(base + STATUS_REG);
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pio_int_reg = inb(base + PIO_INT_REG);
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int_reg = inb(base + INT_REG);
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spin_unlock_irqrestore(dev->host_lock, flags);
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/* First, we handle error conditions */
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if(int_reg & SCI) /* SCSI Reset */
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{
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printk(KERN_DEBUG "sym53c416: Reset received\n");
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current_command->SCp.phase = idle;
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current_command->result = DID_RESET << 16;
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spin_lock_irqsave(dev->host_lock, flags);
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current_command->scsi_done(current_command);
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spin_unlock_irqrestore(dev->host_lock, flags);
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goto out;
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}
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if(int_reg & ILCMD) /* Illegal Command */
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{
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printk(KERN_WARNING "sym53c416: Illegal Command: 0x%02x.\n", inb(base + COMMAND_REG));
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current_command->SCp.phase = idle;
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current_command->result = DID_ERROR << 16;
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spin_lock_irqsave(dev->host_lock, flags);
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current_command->scsi_done(current_command);
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spin_unlock_irqrestore(dev->host_lock, flags);
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goto out;
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}
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if(status_reg & GE) /* Gross Error */
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{
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printk(KERN_WARNING "sym53c416: Controller reports gross error.\n");
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current_command->SCp.phase = idle;
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current_command->result = DID_ERROR << 16;
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spin_lock_irqsave(dev->host_lock, flags);
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current_command->scsi_done(current_command);
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spin_unlock_irqrestore(dev->host_lock, flags);
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goto out;
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}
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if(status_reg & PE) /* Parity Error */
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{
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printk(KERN_WARNING "sym53c416:SCSI parity error.\n");
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current_command->SCp.phase = idle;
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current_command->result = DID_PARITY << 16;
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spin_lock_irqsave(dev->host_lock, flags);
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current_command->scsi_done(current_command);
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spin_unlock_irqrestore(dev->host_lock, flags);
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goto out;
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}
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if(pio_int_reg & (CE | OUE))
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{
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printk(KERN_WARNING "sym53c416: PIO interrupt error.\n");
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current_command->SCp.phase = idle;
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current_command->result = DID_ERROR << 16;
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spin_lock_irqsave(dev->host_lock, flags);
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current_command->scsi_done(current_command);
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spin_unlock_irqrestore(dev->host_lock, flags);
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goto out;
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}
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if(int_reg & DIS) /* Disconnect */
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{
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if(current_command->SCp.phase != message_in)
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current_command->result = DID_NO_CONNECT << 16;
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else
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current_command->result = (current_command->SCp.Status & 0xFF) | ((current_command->SCp.Message & 0xFF) << 8) | (DID_OK << 16);
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current_command->SCp.phase = idle;
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spin_lock_irqsave(dev->host_lock, flags);
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current_command->scsi_done(current_command);
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spin_unlock_irqrestore(dev->host_lock, flags);
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goto out;
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}
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/* Now we handle SCSI phases */
|
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|
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switch(status_reg & PHBITS) /* Filter SCSI phase out of status reg */
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{
|
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case PHASE_DATA_OUT:
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{
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if(int_reg & BS)
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{
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current_command->SCp.phase = data_out;
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outb(FLUSH_FIFO, base + COMMAND_REG);
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sym53c416_set_transfer_counter(base,
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scsi_bufflen(current_command));
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outb(TRANSFER_INFORMATION | PIO_MODE, base + COMMAND_REG);
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|
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scsi_for_each_sg(current_command,
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sg, scsi_sg_count(current_command), i) {
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tot_trans += sym53c416_write(base,
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SG_ADDRESS(sg),
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sg->length);
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}
|
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if(tot_trans < current_command->underflow)
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printk(KERN_WARNING "sym53c416: Underflow, wrote %d bytes, request for %d bytes.\n", tot_trans, current_command->underflow);
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}
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break;
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}
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|
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case PHASE_DATA_IN:
|
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{
|
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if(int_reg & BS)
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{
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current_command->SCp.phase = data_in;
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outb(FLUSH_FIFO, base + COMMAND_REG);
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sym53c416_set_transfer_counter(base,
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scsi_bufflen(current_command));
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|
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outb(TRANSFER_INFORMATION | PIO_MODE, base + COMMAND_REG);
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scsi_for_each_sg(current_command,
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sg, scsi_sg_count(current_command), i) {
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tot_trans += sym53c416_read(base,
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SG_ADDRESS(sg),
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sg->length);
|
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}
|
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if(tot_trans < current_command->underflow)
|
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printk(KERN_WARNING "sym53c416: Underflow, read %d bytes, request for %d bytes.\n", tot_trans, current_command->underflow);
|
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}
|
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break;
|
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}
|
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|
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case PHASE_COMMAND:
|
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{
|
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current_command->SCp.phase = command_ph;
|
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printk(KERN_ERR "sym53c416: Unknown interrupt in command phase.\n");
|
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break;
|
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}
|
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|
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case PHASE_STATUS:
|
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{
|
|
current_command->SCp.phase = status_ph;
|
|
outb(FLUSH_FIFO, base + COMMAND_REG);
|
|
outb(INIT_COMM_COMPLETE_SEQ, base + COMMAND_REG);
|
|
break;
|
|
}
|
|
|
|
case PHASE_RESERVED_1:
|
|
case PHASE_RESERVED_2:
|
|
{
|
|
printk(KERN_ERR "sym53c416: Reserved phase occurred.\n");
|
|
break;
|
|
}
|
|
|
|
case PHASE_MESSAGE_OUT:
|
|
{
|
|
current_command->SCp.phase = message_out;
|
|
outb(SET_ATN, base + COMMAND_REG);
|
|
outb(MSG_ACCEPTED, base + COMMAND_REG);
|
|
break;
|
|
}
|
|
|
|
case PHASE_MESSAGE_IN:
|
|
{
|
|
current_command->SCp.phase = message_in;
|
|
current_command->SCp.Status = inb(base + SCSI_FIFO);
|
|
current_command->SCp.Message = inb(base + SCSI_FIFO);
|
|
if(current_command->SCp.Message == SAVE_POINTERS || current_command->SCp.Message == DISCONNECT)
|
|
outb(SET_ATN, base + COMMAND_REG);
|
|
outb(MSG_ACCEPTED, base + COMMAND_REG);
|
|
break;
|
|
}
|
|
}
|
|
out:
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static void sym53c416_init(int base, int scsi_id)
|
|
{
|
|
outb(RESET_CHIP, base + COMMAND_REG);
|
|
outb(NOOP, base + COMMAND_REG);
|
|
outb(0x99, base + TOM); /* Time out of 250 ms */
|
|
outb(0x05, base + STP);
|
|
outb(0x00, base + SYNC_OFFSET);
|
|
outb(EPC | scsi_id, base + CONF_REG_1);
|
|
outb(FE | SCSI2 | TBPA, base + CONF_REG_2);
|
|
outb(IDMRC | QTE | CDB10 | FSCSI | FCLK, base + CONF_REG_3);
|
|
outb(0x83 | EAN, base + CONF_REG_4);
|
|
outb(IE | WSE0, base + CONF_REG_5);
|
|
outb(0, base + FEATURE_EN);
|
|
}
|
|
|
|
static int sym53c416_probeirq(int base, int scsi_id)
|
|
{
|
|
int irq, irqs;
|
|
unsigned long i;
|
|
|
|
/* Clear interrupt register */
|
|
inb(base + INT_REG);
|
|
/* Start probing for irq's */
|
|
irqs = probe_irq_on();
|
|
/* Reinit chip */
|
|
sym53c416_init(base, scsi_id);
|
|
/* Cause interrupt */
|
|
outb(NOOP, base + COMMAND_REG);
|
|
outb(ILLEGAL, base + COMMAND_REG);
|
|
outb(0x07, base + DEST_BUS_ID);
|
|
outb(0x00, base + DEST_BUS_ID);
|
|
/* Wait for interrupt to occur */
|
|
i = jiffies + 20;
|
|
while(time_before(jiffies, i) && !(inb(base + STATUS_REG) & SCI))
|
|
barrier();
|
|
if(time_before_eq(i, jiffies)) /* timed out */
|
|
return 0;
|
|
/* Get occurred irq */
|
|
irq = probe_irq_off(irqs);
|
|
sym53c416_init(base, scsi_id);
|
|
return irq;
|
|
}
|
|
|
|
/* Setup: sym53c416=base,irq */
|
|
void sym53c416_setup(char *str, int *ints)
|
|
{
|
|
int i;
|
|
|
|
if(host_index >= MAXHOSTS)
|
|
{
|
|
printk(KERN_WARNING "sym53c416: Too many hosts defined\n");
|
|
return;
|
|
}
|
|
if(ints[0] < 1 || ints[0] > 2)
|
|
{
|
|
printk(KERN_ERR "sym53c416: Wrong number of parameters:\n");
|
|
printk(KERN_ERR "sym53c416: usage: sym53c416=<base>[,<irq>]\n");
|
|
return;
|
|
}
|
|
for(i = 0; i < host_index && i >= 0; i++)
|
|
if(hosts[i].base == ints[1])
|
|
i = -2;
|
|
if(i >= 0)
|
|
{
|
|
hosts[host_index].base = ints[1];
|
|
hosts[host_index].irq = (ints[0] == 2)? ints[2] : 0;
|
|
host_index++;
|
|
}
|
|
}
|
|
|
|
static int sym53c416_test(int base)
|
|
{
|
|
outb(RESET_CHIP, base + COMMAND_REG);
|
|
outb(NOOP, base + COMMAND_REG);
|
|
if(inb(base + COMMAND_REG) != NOOP)
|
|
return 0;
|
|
if(!inb(base + TC_HIGH) || inb(base + TC_HIGH) == 0xFF)
|
|
return 0;
|
|
if((inb(base + PIO_INT_REG) & (FULL | EMPTY | CE | OUE | FIE | EIE)) != EMPTY)
|
|
return 0;
|
|
return 1;
|
|
}
|
|
|
|
|
|
static struct isapnp_device_id id_table[] __devinitdata = {
|
|
{ ISAPNP_ANY_ID, ISAPNP_ANY_ID,
|
|
ISAPNP_VENDOR('S','L','I'), ISAPNP_FUNCTION(0x4161), 0 },
|
|
{ ISAPNP_ANY_ID, ISAPNP_ANY_ID,
|
|
ISAPNP_VENDOR('S','L','I'), ISAPNP_FUNCTION(0x4163), 0 },
|
|
{ ISAPNP_DEVICE_SINGLE_END }
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(isapnp, id_table);
|
|
|
|
static void sym53c416_probe(void)
|
|
{
|
|
int *base = probeaddrs;
|
|
int ints[2];
|
|
|
|
ints[0] = 1;
|
|
for(; *base; base++) {
|
|
if (request_region(*base, IO_RANGE, ID)) {
|
|
if (sym53c416_test(*base)) {
|
|
ints[1] = *base;
|
|
sym53c416_setup(NULL, ints);
|
|
}
|
|
release_region(*base, IO_RANGE);
|
|
}
|
|
}
|
|
}
|
|
|
|
int __init sym53c416_detect(struct scsi_host_template *tpnt)
|
|
{
|
|
unsigned long flags;
|
|
struct Scsi_Host * shpnt = NULL;
|
|
int i;
|
|
int count;
|
|
struct pnp_dev *idev = NULL;
|
|
|
|
#ifdef MODULE
|
|
int ints[3];
|
|
|
|
ints[0] = 2;
|
|
if(sym53c416_base[0])
|
|
{
|
|
ints[1] = sym53c416_base[0];
|
|
ints[2] = sym53c416_base[1];
|
|
sym53c416_setup(NULL, ints);
|
|
}
|
|
if(sym53c416_base_1[0])
|
|
{
|
|
ints[1] = sym53c416_base_1[0];
|
|
ints[2] = sym53c416_base_1[1];
|
|
sym53c416_setup(NULL, ints);
|
|
}
|
|
if(sym53c416_base_2[0])
|
|
{
|
|
ints[1] = sym53c416_base_2[0];
|
|
ints[2] = sym53c416_base_2[1];
|
|
sym53c416_setup(NULL, ints);
|
|
}
|
|
if(sym53c416_base_3[0])
|
|
{
|
|
ints[1] = sym53c416_base_3[0];
|
|
ints[2] = sym53c416_base_3[1];
|
|
sym53c416_setup(NULL, ints);
|
|
}
|
|
#endif
|
|
printk(KERN_INFO "sym53c416.c: %s\n", VERSION_STRING);
|
|
|
|
for (i=0; id_table[i].vendor != 0; i++) {
|
|
while((idev=pnp_find_dev(NULL, id_table[i].vendor,
|
|
id_table[i].function, idev))!=NULL)
|
|
{
|
|
int i[3];
|
|
|
|
if(pnp_device_attach(idev)<0)
|
|
{
|
|
printk(KERN_WARNING "sym53c416: unable to attach PnP device.\n");
|
|
continue;
|
|
}
|
|
if(pnp_activate_dev(idev) < 0)
|
|
{
|
|
printk(KERN_WARNING "sym53c416: unable to activate PnP device.\n");
|
|
pnp_device_detach(idev);
|
|
continue;
|
|
|
|
}
|
|
|
|
i[0] = 2;
|
|
i[1] = pnp_port_start(idev, 0);
|
|
i[2] = pnp_irq(idev, 0);
|
|
|
|
printk(KERN_INFO "sym53c416: ISAPnP card found and configured at 0x%X, IRQ %d.\n",
|
|
i[1], i[2]);
|
|
sym53c416_setup(NULL, i);
|
|
}
|
|
}
|
|
sym53c416_probe();
|
|
|
|
/* Now we register and set up each host adapter found... */
|
|
for(count = 0, i = 0; i < host_index; i++) {
|
|
if (!request_region(hosts[i].base, IO_RANGE, ID))
|
|
continue;
|
|
if (!sym53c416_test(hosts[i].base)) {
|
|
printk(KERN_WARNING "No sym53c416 found at address 0x%03x\n", hosts[i].base);
|
|
goto fail_release_region;
|
|
}
|
|
|
|
/* We don't have an irq yet, so we should probe for one */
|
|
if (!hosts[i].irq)
|
|
hosts[i].irq = sym53c416_probeirq(hosts[i].base, hosts[i].scsi_id);
|
|
if (!hosts[i].irq)
|
|
goto fail_release_region;
|
|
|
|
shpnt = scsi_register(tpnt, 0);
|
|
if (!shpnt)
|
|
goto fail_release_region;
|
|
/* Request for specified IRQ */
|
|
if (request_irq(hosts[i].irq, sym53c416_intr_handle, 0, ID, shpnt))
|
|
goto fail_free_host;
|
|
|
|
spin_lock_irqsave(&sym53c416_lock, flags);
|
|
shpnt->unique_id = hosts[i].base;
|
|
shpnt->io_port = hosts[i].base;
|
|
shpnt->n_io_port = IO_RANGE;
|
|
shpnt->irq = hosts[i].irq;
|
|
shpnt->this_id = hosts[i].scsi_id;
|
|
sym53c416_init(hosts[i].base, hosts[i].scsi_id);
|
|
count++;
|
|
spin_unlock_irqrestore(&sym53c416_lock, flags);
|
|
continue;
|
|
|
|
fail_free_host:
|
|
scsi_unregister(shpnt);
|
|
fail_release_region:
|
|
release_region(hosts[i].base, IO_RANGE);
|
|
}
|
|
return count;
|
|
}
|
|
|
|
const char *sym53c416_info(struct Scsi_Host *SChost)
|
|
{
|
|
int i;
|
|
int base = SChost->io_port;
|
|
int irq = SChost->irq;
|
|
int scsi_id = 0;
|
|
int rev = inb(base + TC_HIGH);
|
|
|
|
for(i = 0; i < host_index; i++)
|
|
if(hosts[i].base == base)
|
|
scsi_id = hosts[i].scsi_id;
|
|
sprintf(info, "Symbios Logic 53c416 (rev. %d) at 0x%03x, irq %d, SCSI-ID %d, %s pio", rev, base, irq, scsi_id, (fastpio)? "fast" : "slow");
|
|
return info;
|
|
}
|
|
|
|
int sym53c416_queuecommand(Scsi_Cmnd *SCpnt, void (*done)(Scsi_Cmnd *))
|
|
{
|
|
int base;
|
|
unsigned long flags = 0;
|
|
int i;
|
|
|
|
/* Store base register as we can have more than one controller in the system */
|
|
base = SCpnt->device->host->io_port;
|
|
current_command = SCpnt; /* set current command */
|
|
current_command->scsi_done = done; /* set ptr to done function */
|
|
current_command->SCp.phase = command_ph; /* currect phase is the command phase */
|
|
current_command->SCp.Status = 0;
|
|
current_command->SCp.Message = 0;
|
|
|
|
spin_lock_irqsave(&sym53c416_lock, flags);
|
|
outb(scmd_id(SCpnt), base + DEST_BUS_ID); /* Set scsi id target */
|
|
outb(FLUSH_FIFO, base + COMMAND_REG); /* Flush SCSI and PIO FIFO's */
|
|
/* Write SCSI command into the SCSI fifo */
|
|
for(i = 0; i < SCpnt->cmd_len; i++)
|
|
outb(SCpnt->cmnd[i], base + SCSI_FIFO);
|
|
/* Start selection sequence */
|
|
outb(SEL_WITHOUT_ATN_SEQ, base + COMMAND_REG);
|
|
/* Now an interrupt will be generated which we will catch in out interrupt routine */
|
|
spin_unlock_irqrestore(&sym53c416_lock, flags);
|
|
return 0;
|
|
}
|
|
|
|
static int sym53c416_host_reset(Scsi_Cmnd *SCpnt)
|
|
{
|
|
int base;
|
|
int scsi_id = -1;
|
|
int i;
|
|
unsigned long flags;
|
|
|
|
spin_lock_irqsave(&sym53c416_lock, flags);
|
|
|
|
/* printk("sym53c416_reset\n"); */
|
|
base = SCpnt->device->host->io_port;
|
|
/* search scsi_id - fixme, we shouldnt need to iterate for this! */
|
|
for(i = 0; i < host_index && scsi_id == -1; i++)
|
|
if(hosts[i].base == base)
|
|
scsi_id = hosts[i].scsi_id;
|
|
outb(RESET_CHIP, base + COMMAND_REG);
|
|
outb(NOOP | PIO_MODE, base + COMMAND_REG);
|
|
outb(RESET_SCSI_BUS, base + COMMAND_REG);
|
|
sym53c416_init(base, scsi_id);
|
|
|
|
spin_unlock_irqrestore(&sym53c416_lock, flags);
|
|
return SUCCESS;
|
|
}
|
|
|
|
static int sym53c416_release(struct Scsi_Host *shost)
|
|
{
|
|
if (shost->irq)
|
|
free_irq(shost->irq, shost);
|
|
if (shost->io_port && shost->n_io_port)
|
|
release_region(shost->io_port, shost->n_io_port);
|
|
return 0;
|
|
}
|
|
|
|
static int sym53c416_bios_param(struct scsi_device *sdev,
|
|
struct block_device *dev,
|
|
sector_t capacity, int *ip)
|
|
{
|
|
int size;
|
|
|
|
size = capacity;
|
|
ip[0] = 64; /* heads */
|
|
ip[1] = 32; /* sectors */
|
|
if((ip[2] = size >> 11) > 1024) /* cylinders, test for big disk */
|
|
{
|
|
ip[0] = 255; /* heads */
|
|
ip[1] = 63; /* sectors */
|
|
ip[2] = size / (255 * 63); /* cylinders */
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
/* Loadable module support */
|
|
#ifdef MODULE
|
|
|
|
MODULE_AUTHOR("Lieven Willems");
|
|
MODULE_LICENSE("GPL");
|
|
|
|
module_param_array(sym53c416, uint, NULL, 0);
|
|
module_param_array(sym53c416_1, uint, NULL, 0);
|
|
module_param_array(sym53c416_2, uint, NULL, 0);
|
|
module_param_array(sym53c416_3, uint, NULL, 0);
|
|
|
|
#endif
|
|
|
|
static struct scsi_host_template driver_template = {
|
|
.proc_name = "sym53c416",
|
|
.name = "Symbios Logic 53c416",
|
|
.detect = sym53c416_detect,
|
|
.info = sym53c416_info,
|
|
.queuecommand = sym53c416_queuecommand,
|
|
.eh_host_reset_handler =sym53c416_host_reset,
|
|
.release = sym53c416_release,
|
|
.bios_param = sym53c416_bios_param,
|
|
.can_queue = 1,
|
|
.this_id = SYM53C416_SCSI_ID,
|
|
.sg_tablesize = 32,
|
|
.cmd_per_lun = 1,
|
|
.unchecked_isa_dma = 1,
|
|
.use_clustering = ENABLE_CLUSTERING,
|
|
};
|
|
#include "scsi_module.c"
|