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The lpuart of imx7ulp is basically the same as ls1021a. It's also 32 bit width register, but unlike ls1021a, it's little endian. Besides that, imx7ulp lpuart has a minor different register layout from ls1021a. Cc: devicetree@vger.kernel.org Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Jiri Slaby <jslaby@suse.com> Cc: Stefan Agner <stefan@agner.ch> Cc: Mingkai Hu <Mingkai.Hu@nxp.com> Cc: Yangbo Lu <yangbo.lu@nxp.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
33 lines
1.2 KiB
Text
33 lines
1.2 KiB
Text
* Freescale low power universal asynchronous receiver/transmitter (lpuart)
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Required properties:
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- compatible :
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- "fsl,vf610-lpuart" for lpuart compatible with the one integrated
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on Vybrid vf610 SoC with 8-bit register organization
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- "fsl,ls1021a-lpuart" for lpuart compatible with the one integrated
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on LS1021A SoC with 32-bit big-endian register organization
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- "fsl,imx7ulp-lpuart" for lpuart compatible with the one integrated
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on i.MX7ULP SoC with 32-bit little-endian register organization
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- reg : Address and length of the register set for the device
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- interrupts : Should contain uart interrupt
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- clocks : phandle + clock specifier pairs, one for each entry in clock-names
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- clock-names : should contain: "ipg" - the uart clock
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Optional properties:
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- dmas: A list of two dma specifiers, one for each entry in dma-names.
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- dma-names: should contain "tx" and "rx".
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Note: Optional properties for DMA support. Write them both or both not.
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Example:
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uart0: serial@40027000 {
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compatible = "fsl,vf610-lpuart";
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reg = <0x40027000 0x1000>;
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interrupts = <0 61 0x00>;
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clocks = <&clks VF610_CLK_UART0>;
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clock-names = "ipg";
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dmas = <&edma0 0 2>,
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<&edma0 0 3>;
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dma-names = "rx","tx";
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};
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