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5f0047466e
This adds dt-binding documentation for MediaTek MT7622 SoC which currently only includes basic items such as ARM CPU, MediaTek SYSIRQ and UART. Signed-off-by: Sean Wang <sean.wang@mediatek.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
40 lines
1.5 KiB
Text
40 lines
1.5 KiB
Text
* Mediatek Universal Asynchronous Receiver/Transmitter (UART)
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Required properties:
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- compatible should contain:
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* "mediatek,mt2701-uart" for MT2701 compatible UARTS
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* "mediatek,mt6580-uart" for MT6580 compatible UARTS
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* "mediatek,mt6582-uart" for MT6582 compatible UARTS
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* "mediatek,mt6589-uart" for MT6589 compatible UARTS
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* "mediatek,mt6755-uart" for MT6755 compatible UARTS
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* "mediatek,mt6795-uart" for MT6795 compatible UARTS
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* "mediatek,mt6797-uart" for MT6797 compatible UARTS
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* "mediatek,mt7622-uart" for MT7622 compatible UARTS
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* "mediatek,mt7623-uart" for MT7623 compatible UARTS
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* "mediatek,mt8127-uart" for MT8127 compatible UARTS
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* "mediatek,mt8135-uart" for MT8135 compatible UARTS
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* "mediatek,mt8173-uart" for MT8173 compatible UARTS
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* "mediatek,mt6577-uart" for MT6577 and all of the above
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- reg: The base address of the UART register bank.
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- interrupts: A single interrupt specifier.
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- clocks : Must contain an entry for each entry in clock-names.
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See ../clocks/clock-bindings.txt for details.
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- clock-names:
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- "baud": The clock the baudrate is derived from
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- "bus": The bus clock for register accesses (optional)
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For compatibility with older device trees an unnamed clock is used for the
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baud clock if the baudclk does not exist. Do not use this for new designs.
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Example:
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uart0: serial@11006000 {
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compatible = "mediatek,mt6589-uart", "mediatek,mt6577-uart";
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reg = <0x11006000 0x400>;
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interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_LOW>;
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clocks = <&uart_clk>, <&bus_clk>;
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clock-names = "baud", "bus";
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};
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