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7d3eb23c4c
Introduce an emulated device-set plus driver to register CXL memory devices, 'struct cxl_memdev' instances, in the mock cxl_test topology. This enables the development of HDM Decoder (Host-managed Device Memory Decoder) programming flow (region provisioning) in an environment that can be updated alongside the kernel as it gains more functionality. Whereas the cxl_pci module looks for CXL memory expanders on the 'pci' bus, the cxl_mock_mem module attaches to CXL expanders on the platform bus emitted by cxl_test. Acked-by: Ben Widawsky <ben.widawsky@intel.com> Reported-by: kernel test robot <lkp@intel.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://lore.kernel.org/r/163116440099.2460985.10692549614409346604.stgit@dwillia2-desk3.amr.corp.intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
24 lines
617 B
C
24 lines
617 B
C
// SPDX-License-Identifier: GPL-2.0-only
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/* Copyright(c) 2021 Intel Corporation. All rights reserved. */
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#include <cxl.h>
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#include "test/mock.h"
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#include <core/core.h>
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int match_nvdimm_bridge(struct device *dev, const void *data)
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{
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int index, rc = 0;
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struct cxl_mock_ops *ops = get_cxl_mock_ops(&index);
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const struct cxl_nvdimm *cxl_nvd = data;
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if (ops) {
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if (dev->type == &cxl_nvdimm_bridge_type &&
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(ops->is_mock_dev(dev->parent->parent) ==
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ops->is_mock_dev(cxl_nvd->dev.parent->parent)))
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rc = 1;
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} else
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rc = dev->type == &cxl_nvdimm_bridge_type;
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put_cxl_mock_ops(index);
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return rc;
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}
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