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![Markus Schneider-Pargmann](/assets/img/avatar_default.png)
mtk-sysirq doesn't require specific logic to work with wakeup IRQs. To allow registered IRQs to be used as a wakeup-source, add the flag IRQCHIP_SKIP_SET_WAKE. Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20210707062004.782787-1-msp@baylibre.com
235 lines
5.8 KiB
C
235 lines
5.8 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2014 MediaTek Inc.
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* Author: Joe.C <yingjoe.chen@mediatek.com>
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*/
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#include <linux/irq.h>
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#include <linux/irqchip.h>
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#include <linux/irqdomain.h>
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#include <linux/of.h>
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#include <linux/of_irq.h>
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#include <linux/of_address.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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struct mtk_sysirq_chip_data {
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raw_spinlock_t lock;
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u32 nr_intpol_bases;
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void __iomem **intpol_bases;
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u32 *intpol_words;
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u8 *intpol_idx;
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u16 *which_word;
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};
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static int mtk_sysirq_set_type(struct irq_data *data, unsigned int type)
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{
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irq_hw_number_t hwirq = data->hwirq;
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struct mtk_sysirq_chip_data *chip_data = data->chip_data;
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u8 intpol_idx = chip_data->intpol_idx[hwirq];
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void __iomem *base;
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u32 offset, reg_index, value;
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unsigned long flags;
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int ret;
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base = chip_data->intpol_bases[intpol_idx];
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reg_index = chip_data->which_word[hwirq];
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offset = hwirq & 0x1f;
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raw_spin_lock_irqsave(&chip_data->lock, flags);
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value = readl_relaxed(base + reg_index * 4);
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if (type == IRQ_TYPE_LEVEL_LOW || type == IRQ_TYPE_EDGE_FALLING) {
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if (type == IRQ_TYPE_LEVEL_LOW)
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type = IRQ_TYPE_LEVEL_HIGH;
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else
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type = IRQ_TYPE_EDGE_RISING;
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value |= (1 << offset);
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} else {
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value &= ~(1 << offset);
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}
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writel_relaxed(value, base + reg_index * 4);
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data = data->parent_data;
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ret = data->chip->irq_set_type(data, type);
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raw_spin_unlock_irqrestore(&chip_data->lock, flags);
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return ret;
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}
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static struct irq_chip mtk_sysirq_chip = {
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.name = "MT_SYSIRQ",
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.irq_mask = irq_chip_mask_parent,
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.irq_unmask = irq_chip_unmask_parent,
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.irq_eoi = irq_chip_eoi_parent,
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.irq_set_type = mtk_sysirq_set_type,
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.irq_retrigger = irq_chip_retrigger_hierarchy,
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.irq_set_affinity = irq_chip_set_affinity_parent,
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.flags = IRQCHIP_SKIP_SET_WAKE,
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};
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static int mtk_sysirq_domain_translate(struct irq_domain *d,
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struct irq_fwspec *fwspec,
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unsigned long *hwirq,
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unsigned int *type)
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{
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if (is_of_node(fwspec->fwnode)) {
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if (fwspec->param_count != 3)
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return -EINVAL;
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/* No PPI should point to this domain */
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if (fwspec->param[0] != 0)
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return -EINVAL;
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*hwirq = fwspec->param[1];
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*type = fwspec->param[2] & IRQ_TYPE_SENSE_MASK;
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return 0;
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}
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return -EINVAL;
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}
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static int mtk_sysirq_domain_alloc(struct irq_domain *domain, unsigned int virq,
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unsigned int nr_irqs, void *arg)
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{
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int i;
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irq_hw_number_t hwirq;
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struct irq_fwspec *fwspec = arg;
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struct irq_fwspec gic_fwspec = *fwspec;
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if (fwspec->param_count != 3)
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return -EINVAL;
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/* sysirq doesn't support PPI */
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if (fwspec->param[0])
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return -EINVAL;
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hwirq = fwspec->param[1];
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for (i = 0; i < nr_irqs; i++)
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irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i,
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&mtk_sysirq_chip,
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domain->host_data);
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gic_fwspec.fwnode = domain->parent->fwnode;
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return irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, &gic_fwspec);
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}
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static const struct irq_domain_ops sysirq_domain_ops = {
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.translate = mtk_sysirq_domain_translate,
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.alloc = mtk_sysirq_domain_alloc,
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.free = irq_domain_free_irqs_common,
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};
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static int __init mtk_sysirq_of_init(struct device_node *node,
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struct device_node *parent)
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{
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struct irq_domain *domain, *domain_parent;
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struct mtk_sysirq_chip_data *chip_data;
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int ret, size, intpol_num = 0, nr_intpol_bases = 0, i = 0;
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domain_parent = irq_find_host(parent);
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if (!domain_parent) {
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pr_err("mtk_sysirq: interrupt-parent not found\n");
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return -EINVAL;
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}
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chip_data = kzalloc(sizeof(*chip_data), GFP_KERNEL);
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if (!chip_data)
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return -ENOMEM;
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while (of_get_address(node, i++, NULL, NULL))
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nr_intpol_bases++;
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if (nr_intpol_bases == 0) {
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pr_err("mtk_sysirq: base address not specified\n");
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ret = -EINVAL;
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goto out_free_chip;
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}
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chip_data->intpol_words = kcalloc(nr_intpol_bases,
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sizeof(*chip_data->intpol_words),
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GFP_KERNEL);
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if (!chip_data->intpol_words) {
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ret = -ENOMEM;
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goto out_free_chip;
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}
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chip_data->intpol_bases = kcalloc(nr_intpol_bases,
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sizeof(*chip_data->intpol_bases),
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GFP_KERNEL);
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if (!chip_data->intpol_bases) {
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ret = -ENOMEM;
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goto out_free_intpol_words;
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}
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for (i = 0; i < nr_intpol_bases; i++) {
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struct resource res;
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ret = of_address_to_resource(node, i, &res);
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size = resource_size(&res);
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intpol_num += size * 8;
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chip_data->intpol_words[i] = size / 4;
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chip_data->intpol_bases[i] = of_iomap(node, i);
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if (ret || !chip_data->intpol_bases[i]) {
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pr_err("%pOF: couldn't map region %d\n", node, i);
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ret = -ENODEV;
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goto out_free_intpol;
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}
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}
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chip_data->intpol_idx = kcalloc(intpol_num,
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sizeof(*chip_data->intpol_idx),
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GFP_KERNEL);
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if (!chip_data->intpol_idx) {
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ret = -ENOMEM;
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goto out_free_intpol;
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}
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chip_data->which_word = kcalloc(intpol_num,
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sizeof(*chip_data->which_word),
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GFP_KERNEL);
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if (!chip_data->which_word) {
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ret = -ENOMEM;
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goto out_free_intpol_idx;
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}
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/*
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* assign an index of the intpol_bases for each irq
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* to set it fast later
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*/
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for (i = 0; i < intpol_num ; i++) {
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u32 word = i / 32, j;
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for (j = 0; word >= chip_data->intpol_words[j] ; j++)
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word -= chip_data->intpol_words[j];
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chip_data->intpol_idx[i] = j;
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chip_data->which_word[i] = word;
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}
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domain = irq_domain_add_hierarchy(domain_parent, 0, intpol_num, node,
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&sysirq_domain_ops, chip_data);
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if (!domain) {
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ret = -ENOMEM;
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goto out_free_which_word;
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}
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raw_spin_lock_init(&chip_data->lock);
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return 0;
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out_free_which_word:
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kfree(chip_data->which_word);
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out_free_intpol_idx:
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kfree(chip_data->intpol_idx);
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out_free_intpol:
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for (i = 0; i < nr_intpol_bases; i++)
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if (chip_data->intpol_bases[i])
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iounmap(chip_data->intpol_bases[i]);
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kfree(chip_data->intpol_bases);
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out_free_intpol_words:
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kfree(chip_data->intpol_words);
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out_free_chip:
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kfree(chip_data);
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return ret;
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}
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IRQCHIP_DECLARE(mtk_sysirq, "mediatek,mt6577-sysirq", mtk_sysirq_of_init);
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